[llvm] r356453 - [InstCombine] add FMF to tests for extra coverage; NFC

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Tue Mar 19 06:39:29 2019
New Revision: 356453

URL: http://llvm.org/viewvc/llvm-project?rev=356453&view=rev
Log:
[InstCombine] add FMF to tests for extra coverage; NFC

ninf is probably the only relevant possible flag here
(nnan allows simplification and nsz never makes a difference).

Modified:
    llvm/trunk/test/Transforms/InstCombine/and-fcmp.ll

Modified: llvm/trunk/test/Transforms/InstCombine/and-fcmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/and-fcmp.ll?rev=356453&r1=356452&r2=356453&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/and-fcmp.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/and-fcmp.ll Tue Mar 19 06:39:29 2019
@@ -25,30 +25,30 @@ define <2 x i1> @PR1738_vec_undef(<2 x d
 
 define i1 @PR41069(i1 %z, float %c, float %d) {
 ; CHECK-LABEL: @PR41069(
-; CHECK-NEXT:    [[ORD1:%.*]] = fcmp ord float [[C:%.*]], 0.000000e+00
+; CHECK-NEXT:    [[ORD1:%.*]] = fcmp arcp ord float [[C:%.*]], 0.000000e+00
 ; CHECK-NEXT:    [[AND:%.*]] = and i1 [[ORD1]], [[Z:%.*]]
-; CHECK-NEXT:    [[ORD2:%.*]] = fcmp ord float [[D:%.*]], 0.000000e+00
+; CHECK-NEXT:    [[ORD2:%.*]] = fcmp afn ord float [[D:%.*]], 0.000000e+00
 ; CHECK-NEXT:    [[R:%.*]] = and i1 [[AND]], [[ORD2]]
 ; CHECK-NEXT:    ret i1 [[R]]
 ;
-  %ord1 = fcmp ord float %c, 0.0
+  %ord1 = fcmp arcp ord float %c, 0.0
   %and = and i1 %ord1, %z
-  %ord2 = fcmp ord float %d, 0.0
+  %ord2 = fcmp afn ord float %d, 0.0
   %r = and i1 %and, %ord2
   ret i1 %r
 }
 
 define i1 @PR41069_commute(i1 %z, float %c, float %d) {
 ; CHECK-LABEL: @PR41069_commute(
-; CHECK-NEXT:    [[ORD1:%.*]] = fcmp ord float [[C:%.*]], 0.000000e+00
+; CHECK-NEXT:    [[ORD1:%.*]] = fcmp ninf ord float [[C:%.*]], 0.000000e+00
 ; CHECK-NEXT:    [[AND:%.*]] = and i1 [[ORD1]], [[Z:%.*]]
-; CHECK-NEXT:    [[ORD2:%.*]] = fcmp ord float [[D:%.*]], 0.000000e+00
+; CHECK-NEXT:    [[ORD2:%.*]] = fcmp reassoc ninf ord float [[D:%.*]], 0.000000e+00
 ; CHECK-NEXT:    [[R:%.*]] = and i1 [[ORD2]], [[AND]]
 ; CHECK-NEXT:    ret i1 [[R]]
 ;
-  %ord1 = fcmp ord float %c, 0.0
+  %ord1 = fcmp ninf ord float %c, 0.0
   %and = and i1 %ord1, %z
-  %ord2 = fcmp ord float %d, 0.0
+  %ord2 = fcmp ninf reassoc ord float %d, 0.0
   %r = and i1 %ord2, %and
   ret i1 %r
 }