[PATCH] D59535: [SelectionDAG] Compute known bits of CopyFromReg

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: lib/CodeGen/SelectionDAG/SelectionDAG.cpp:3181
+  case ISD::CopyFromReg: {
+    const RegisterSDNode *R = cast<RegisterSDNode>(Op.getOperand(1));
+    const unsigned Reg = R->getReg();
----------------
auto R = cast<RegisterSDNode>(Op.getOperand(1));


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Comment at: lib/Target/X86/X86ISelLowering.cpp:19513
 
-  // If the operand types disagree, extend the shift amount to match.  Since
-  // BT ignores high bits (like shifts) we can use anyextend.
-  if (Src.getValueType() != BitNo.getValueType())
+  // If the operand types disagree, extend or truncate the shift amount to match.
+  // Since BT ignores high bits (like shifts) we can use anyextend for the extension.
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piotr wrote:
> lebedev.ri wrote:
> > Does it trigger any tests without the rest of the diff?
> > Does this *have* to be in the same diff as the other part of the diff?
> The change in X86ISelLowering.cpp, when applied on its own, does not trigger on any of the existing tests. However, when applying the rest of the diff, without the change in X86ISelLowering.cpp, there are two assertions thrown in CodeGen/X86/early-ifcvt.ll and CodeGen/X86/switch.ll. 
> 
> Therefore I think the rest of the diff is necessary to trigger the new condition that is handled here.
DAG.getAnyExtOrTrunc ?


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Comment at: test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll:146
+  ret void
+}
+
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Please commit this with trunk's current codegen and then rebase the patch to show the diff.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D59535/new/

https://reviews.llvm.org/D59535