[PATCH] D42885: [AMDGPU] intrintrics for byte/short load/store

[Matt Arsenault via Phabricator via llvm-commits]

arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.

LGTM except formatting



================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:6421
+                                                     MemSDNode *M) const
+{
+  EVT IntVT = LoadVT.changeTypeToInteger();
----------------
Brace placement


================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:6440
+                                                      MemSDNode *M) const
+{
+  SDValue BufferStoreExt = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, Ops[1]);
----------------
Brace placement


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D42885/new/

https://reviews.llvm.org/D42885