[PATCH] D59444: [GlobalISel] Change MachineIRBuilder's SrcOp to contain subregister info

[Amara Emerson via Phabricator via llvm-commits]

aemerson created this revision.
aemerson added a reviewer: aditya_nandakumar.
aemerson added a project: LLVM.
Herald added subscribers: Petar.Avramovic, volkan, hiraditya, javed.absar, kristof.beyls, rovka.

r356304 changed the buildCopy() call to allow passing in a subregister index as well as a source reg. However if the CSE builder learns to do CSE on copies then it can cause incorrect behaviour as the CSE lookups for {src-reg, sub-reg} pairs will only check for the src-reg, as the sub-reg is added after the buildInstr() call.

This change folds an optional subreg index into SrcOp, and teaches CSEInfo how deal with it.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D59444

Files:
  llvm/include/llvm/CodeGen/GlobalISel/CSEInfo.h
  llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
  llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
  llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp
  llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
  llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
  llvm/unittests/CodeGen/GlobalISel/CSETest.cpp

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