[PATCH] D54365: RegAllocFast: Remove early selection loop, the spill calculation will report cost 0 anyway for free regs

[Matt Arsenault via Phabricator via llvm-commits]

arsenm updated this revision to Diff 190633.
arsenm added a comment.

Rebase test fixes


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D54365/new/

https://reviews.llvm.org/D54365

Files:
  lib/CodeGen/RegAllocFast.cpp
  test/CodeGen/AArch64/arm64-fast-isel-br.ll
  test/CodeGen/AArch64/arm64-fast-isel-conversion-fallback.ll
  test/CodeGen/AArch64/arm64-fast-isel-conversion.ll
  test/CodeGen/AArch64/swift-return.ll
  test/CodeGen/AArch64/swifterror.ll
  test/CodeGen/ARM/Windows/alloca.ll
  test/CodeGen/ARM/thumb-big-stack.ll
  test/CodeGen/Mips/Fast-ISel/callabi.ll
  test/CodeGen/Mips/Fast-ISel/pr40325.ll
  test/CodeGen/Mips/GlobalISel/llvm-ir/add.ll
  test/CodeGen/Mips/GlobalISel/llvm-ir/icmp.ll
  test/CodeGen/Mips/GlobalISel/llvm-ir/mul.ll
  test/CodeGen/Mips/GlobalISel/llvm-ir/rem_and_div.ll
  test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll
  test/CodeGen/Mips/GlobalISel/llvm-ir/sub.ll
  test/CodeGen/Mips/GlobalISel/llvm-ir/truncStore_and_aExtLoad.ll
  test/CodeGen/Mips/atomic.ll
  test/CodeGen/Mips/atomic64.ll
  test/CodeGen/Mips/atomicCmpSwapPW.ll
  test/CodeGen/PowerPC/anon_aggr.ll
  test/CodeGen/PowerPC/fp-int128-fp-combine.ll
  test/CodeGen/PowerPC/fp64-to-int16.ll
  test/CodeGen/PowerPC/vsx.ll
  test/CodeGen/SystemZ/swifterror.ll
  test/CodeGen/X86/atomic-unordered.ll
  test/CodeGen/X86/avx-load-store.ll
  test/CodeGen/X86/extend-set-cc-uses-dbg.ll
  test/CodeGen/X86/fast-isel-select.ll
  test/CodeGen/X86/fast-isel-x86-64.ll
  test/CodeGen/X86/pr27591.ll
  test/CodeGen/X86/swift-return.ll
  test/DebugInfo/X86/op_deref.ll