[PATCH] D58758: GlobalISel: Fix RegBankSelect for REG_SEQUENCE
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 14 06:58:35 PDT 2019
arsenm marked an inline comment as done.
arsenm added inline comments.
================
Comment at: lib/CodeGen/GlobalISel/RegisterBankInfo.cpp:214
if (IsCopyLike) {
- OperandsMapping[0] = ValMapping;
- CompleteMapping = true;
+ if (!OperandsMapping[0]) {
+ if (MI.isRegSequence()) {
----------------
qcolombet wrote:
> Is it possible that `OperandsMapping[0] != nullptr` at that point?
>
> Essentially when we set `OperandsMapping[0]` we have either `IsCopyLike == true` and we will `break` out right after we set it or we set it outside of `IsCopyLike == true` then we will never get into that block.
It's initialized to null by the SmallVector constructor, so this is the first time it's ever set. The IsCopyLike check is a loop invariant.
All of this logic for reg_sequence and phi is totally broken for AMDGPU, so I might just end up ripping all of this out eventually. I'm able to hack around reg_sequence in the backend now, but phi will require changing this and the iteration order to defer mapping phis until the operands are all already mapped
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https://reviews.llvm.org/D58758/new/
https://reviews.llvm.org/D58758
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