[PATCH] D59362: [AMDGPU] Fix SGPR fixing through SCC chaining
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 14 06:49:36 PDT 2019
arsenm added a comment.
I'm not sure I understand the exact problem being solved here. What are the observable consequences?
================
Comment at: llvm/test/CodeGen/AMDGPU/udivrem64.ll:172-184
+;FUNC-LABEL: {{^}}test_udiv_k:
+;GCN: v_mul{{.+}} v{{[0-9]+}}, v{{[0-9]+}}, 24
+;GCN: v_mul{{.+}} v{{[0-9]+}}, v{{[0-9]+}}, 24
+;GCN: v_mul{{.+}} v{{[0-9]+}}, v{{[0-9]+}}, 24
+;GCN: v_add
+;GCN: v_addc
+;GCN: v_addc
----------------
I don't see how this is stressing this. Can you add another, more targeted test for this? The div expansion is huge
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D59362/new/
https://reviews.llvm.org/D59362
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