[llvm] r356112 - [X86] Add 64-bit mode command lines to rot32.ll so that it will demonstrate PR41055 for 32 bit. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 13 17:23:31 PDT 2019
Author: ctopper
Date: Wed Mar 13 17:23:31 2019
New Revision: 356112
URL: http://llvm.org/viewvc/llvm-project?rev=356112&view=rev
Log:
[X86] Add 64-bit mode command lines to rot32.ll so that it will demonstrate PR41055 for 32 bit. NFC
Modified:
llvm/trunk/test/CodeGen/X86/rot32.ll
Modified: llvm/trunk/test/CodeGen/X86/rot32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rot32.ll?rev=356112&r1=356111&r2=356112&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rot32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rot32.ll Wed Mar 13 17:23:31 2019
@@ -1,15 +1,26 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s --check-prefix=ALL --check-prefix=X86
-; RUN: llc < %s -mtriple=i686-- -mcpu=corei7-avx | FileCheck %s --check-prefix=ALL --check-prefix=SHLD
-; RUN: llc < %s -mtriple=i686-- -mcpu=core-avx2 | FileCheck %s --check-prefix=ALL --check-prefix=BMI2
+; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s --check-prefix=CHECK32 --check-prefix=X86
+; RUN: llc < %s -mtriple=i686-- -mcpu=corei7-avx | FileCheck %s --check-prefix=CHECK32 --check-prefix=SHLD
+; RUN: llc < %s -mtriple=i686-- -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK32 --check-prefix=BMI2
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s --check-prefix=CHECK64 --check-prefix=X64
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx | FileCheck %s --check-prefix=CHECK64 --check-prefix=SHLD64
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK64 --check-prefix=BMI264
define i32 @foo(i32 %x, i32 %y, i32 %z) nounwind readnone {
-; ALL-LABEL: foo:
-; ALL: # %bb.0: # %entry
-; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl
-; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
-; ALL-NEXT: roll %cl, %eax
-; ALL-NEXT: retl
+; CHECK32-LABEL: foo:
+; CHECK32: # %bb.0: # %entry
+; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
+; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
+; CHECK32-NEXT: roll %cl, %eax
+; CHECK32-NEXT: retl
+;
+; CHECK64-LABEL: foo:
+; CHECK64: # %bb.0: # %entry
+; CHECK64-NEXT: movl %edx, %ecx
+; CHECK64-NEXT: movl %edi, %eax
+; CHECK64-NEXT: # kill: def $cl killed $cl killed $ecx
+; CHECK64-NEXT: roll %cl, %eax
+; CHECK64-NEXT: retq
entry:
%0 = shl i32 %x, %z
%1 = sub i32 32, %z
@@ -19,13 +30,21 @@ entry:
}
define i32 @bar(i32 %x, i32 %y, i32 %z) nounwind readnone {
-; ALL-LABEL: bar:
-; ALL: # %bb.0: # %entry
-; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl
-; ALL-NEXT: movl {{[0-9]+}}(%esp), %edx
-; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
-; ALL-NEXT: shldl %cl, %edx, %eax
-; ALL-NEXT: retl
+; CHECK32-LABEL: bar:
+; CHECK32: # %bb.0: # %entry
+; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
+; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
+; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
+; CHECK32-NEXT: shldl %cl, %edx, %eax
+; CHECK32-NEXT: retl
+;
+; CHECK64-LABEL: bar:
+; CHECK64: # %bb.0: # %entry
+; CHECK64-NEXT: movl %edx, %ecx
+; CHECK64-NEXT: movl %esi, %eax
+; CHECK64-NEXT: # kill: def $cl killed $cl killed $ecx
+; CHECK64-NEXT: shldl %cl, %edi, %eax
+; CHECK64-NEXT: retq
entry:
%0 = shl i32 %y, %z
%1 = sub i32 32, %z
@@ -35,12 +54,20 @@ entry:
}
define i32 @un(i32 %x, i32 %y, i32 %z) nounwind readnone {
-; ALL-LABEL: un:
-; ALL: # %bb.0: # %entry
-; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl
-; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
-; ALL-NEXT: rorl %cl, %eax
-; ALL-NEXT: retl
+; CHECK32-LABEL: un:
+; CHECK32: # %bb.0: # %entry
+; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
+; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
+; CHECK32-NEXT: rorl %cl, %eax
+; CHECK32-NEXT: retl
+;
+; CHECK64-LABEL: un:
+; CHECK64: # %bb.0: # %entry
+; CHECK64-NEXT: movl %edx, %ecx
+; CHECK64-NEXT: movl %edi, %eax
+; CHECK64-NEXT: # kill: def $cl killed $cl killed $ecx
+; CHECK64-NEXT: rorl %cl, %eax
+; CHECK64-NEXT: retq
entry:
%0 = lshr i32 %x, %z
%1 = sub i32 32, %z
@@ -50,13 +77,21 @@ entry:
}
define i32 @bu(i32 %x, i32 %y, i32 %z) nounwind readnone {
-; ALL-LABEL: bu:
-; ALL: # %bb.0: # %entry
-; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl
-; ALL-NEXT: movl {{[0-9]+}}(%esp), %edx
-; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
-; ALL-NEXT: shrdl %cl, %edx, %eax
-; ALL-NEXT: retl
+; CHECK32-LABEL: bu:
+; CHECK32: # %bb.0: # %entry
+; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %cl
+; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
+; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
+; CHECK32-NEXT: shrdl %cl, %edx, %eax
+; CHECK32-NEXT: retl
+;
+; CHECK64-LABEL: bu:
+; CHECK64: # %bb.0: # %entry
+; CHECK64-NEXT: movl %edx, %ecx
+; CHECK64-NEXT: movl %esi, %eax
+; CHECK64-NEXT: # kill: def $cl killed $cl killed $ecx
+; CHECK64-NEXT: shrdl %cl, %edi, %eax
+; CHECK64-NEXT: retq
entry:
%0 = lshr i32 %y, %z
%1 = sub i32 32, %z
@@ -82,6 +117,23 @@ define i32 @xfoo(i32 %x, i32 %y, i32 %z)
; BMI2: # %bb.0: # %entry
; BMI2-NEXT: rorxl $25, {{[0-9]+}}(%esp), %eax
; BMI2-NEXT: retl
+;
+; X64-LABEL: xfoo:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: roll $7, %eax
+; X64-NEXT: retq
+;
+; SHLD64-LABEL: xfoo:
+; SHLD64: # %bb.0: # %entry
+; SHLD64-NEXT: movl %edi, %eax
+; SHLD64-NEXT: shldl $7, %edi, %eax
+; SHLD64-NEXT: retq
+;
+; BMI264-LABEL: xfoo:
+; BMI264: # %bb.0: # %entry
+; BMI264-NEXT: rorxl $25, %edi, %eax
+; BMI264-NEXT: retq
entry:
%0 = lshr i32 %x, 25
%1 = shl i32 %x, 7
@@ -109,6 +161,23 @@ define i32 @xfoop(i32* %p) nounwind read
; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; BMI2-NEXT: rorxl $25, (%eax), %eax
; BMI2-NEXT: retl
+;
+; X64-LABEL: xfoop:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movl (%rdi), %eax
+; X64-NEXT: roll $7, %eax
+; X64-NEXT: retq
+;
+; SHLD64-LABEL: xfoop:
+; SHLD64: # %bb.0: # %entry
+; SHLD64-NEXT: movl (%rdi), %eax
+; SHLD64-NEXT: shldl $7, %eax, %eax
+; SHLD64-NEXT: retq
+;
+; BMI264-LABEL: xfoop:
+; BMI264: # %bb.0: # %entry
+; BMI264-NEXT: rorxl $25, (%rdi), %eax
+; BMI264-NEXT: retq
entry:
%x = load i32, i32* %p
%a = lshr i32 %x, 25
@@ -118,12 +187,18 @@ entry:
}
define i32 @xbar(i32 %x, i32 %y, i32 %z) nounwind readnone {
-; ALL-LABEL: xbar:
-; ALL: # %bb.0: # %entry
-; ALL-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
-; ALL-NEXT: shldl $7, %ecx, %eax
-; ALL-NEXT: retl
+; CHECK32-LABEL: xbar:
+; CHECK32: # %bb.0: # %entry
+; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
+; CHECK32-NEXT: shldl $7, %ecx, %eax
+; CHECK32-NEXT: retl
+;
+; CHECK64-LABEL: xbar:
+; CHECK64: # %bb.0: # %entry
+; CHECK64-NEXT: movl %edi, %eax
+; CHECK64-NEXT: shrdl $25, %esi, %eax
+; CHECK64-NEXT: retq
entry:
%0 = shl i32 %y, 7
%1 = lshr i32 %x, 25
@@ -148,6 +223,23 @@ define i32 @xun(i32 %x, i32 %y, i32 %z)
; BMI2: # %bb.0: # %entry
; BMI2-NEXT: rorxl $7, {{[0-9]+}}(%esp), %eax
; BMI2-NEXT: retl
+;
+; X64-LABEL: xun:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: roll $25, %eax
+; X64-NEXT: retq
+;
+; SHLD64-LABEL: xun:
+; SHLD64: # %bb.0: # %entry
+; SHLD64-NEXT: movl %edi, %eax
+; SHLD64-NEXT: shldl $25, %edi, %eax
+; SHLD64-NEXT: retq
+;
+; BMI264-LABEL: xun:
+; BMI264: # %bb.0: # %entry
+; BMI264-NEXT: rorxl $7, %edi, %eax
+; BMI264-NEXT: retq
entry:
%0 = lshr i32 %x, 7
%1 = shl i32 %x, 25
@@ -175,6 +267,23 @@ define i32 @xunp(i32* %p) nounwind readn
; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; BMI2-NEXT: rorxl $7, (%eax), %eax
; BMI2-NEXT: retl
+;
+; X64-LABEL: xunp:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movl (%rdi), %eax
+; X64-NEXT: roll $25, %eax
+; X64-NEXT: retq
+;
+; SHLD64-LABEL: xunp:
+; SHLD64: # %bb.0: # %entry
+; SHLD64-NEXT: movl (%rdi), %eax
+; SHLD64-NEXT: shldl $25, %eax, %eax
+; SHLD64-NEXT: retq
+;
+; BMI264-LABEL: xunp:
+; BMI264: # %bb.0: # %entry
+; BMI264-NEXT: rorxl $7, (%rdi), %eax
+; BMI264-NEXT: retq
entry:
; shld-label: xunp:
; shld: shldl $25
@@ -186,12 +295,18 @@ entry:
}
define i32 @xbu(i32 %x, i32 %y, i32 %z) nounwind readnone {
-; ALL-LABEL: xbu:
-; ALL: # %bb.0: # %entry
-; ALL-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
-; ALL-NEXT: shldl $25, %ecx, %eax
-; ALL-NEXT: retl
+; CHECK32-LABEL: xbu:
+; CHECK32: # %bb.0: # %entry
+; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
+; CHECK32-NEXT: shldl $25, %ecx, %eax
+; CHECK32-NEXT: retl
+;
+; CHECK64-LABEL: xbu:
+; CHECK64: # %bb.0: # %entry
+; CHECK64-NEXT: movl %edi, %eax
+; CHECK64-NEXT: shldl $25, %esi, %eax
+; CHECK64-NEXT: retq
entry:
%0 = lshr i32 %y, 7
%1 = shl i32 %x, 25
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