[PATCH] D59266: [X86] Add support for {vex2}, {vex3}, and {evex} to the assembler to match gas. Use {evex} to improve the one our 32-bit AVX512 tests.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D59266#1428241 <https://reviews.llvm.org/D59266#1428241>, @RKSimon wrote:

> > Might need to skip use of the _REV MOV instructions for this too, but I haven't done that yet.
>
> Can you elaborate?


We have aliases like this which look for xmm8-15 and xmm0-7 being used in the wrong spots of the modrm byte requiring the 3 byte vex prefix to be used. So we switch to the otherwise redundant move encoding that has the operands swapped in modrm. This enables a 2 byte vex prefix. gcc has the same optimization, but seems to disable it when {vex3} is specified.

  // Aliases to help the assembler pick two byte VEX encodings by swapping the
  // operands relative to the normal instructions to use VEX.R instead of VEX.B.
  def : InstAlias<"vmovdqa\t{$src, $dst|$dst, $src}",
                  (VMOVDQArr_REV VR128L:$dst, VR128H:$src), 0>;
  def : InstAlias<"vmovdqa\t{$src, $dst|$dst, $src}",
                  (VMOVDQAYrr_REV VR256L:$dst, VR256H:$src), 0>;
  def : InstAlias<"vmovdqu\t{$src, $dst|$dst, $src}",
                  (VMOVDQUrr_REV VR128L:$dst, VR128H:$src), 0>;
  def : InstAlias<"vmovdqu\t{$src, $dst|$dst, $src}",
                  (VMOVDQUYrr_REV VR256L:$dst, VR256H:$src), 0>;


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