[PATCH] D58927: [ARM] Fixed an assumption of power-of-2 vector MVT
Diogo N. Sampaio via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 13 03:01:44 PDT 2019
dnsampaio added inline comments.
================
Comment at: lib/Target/ARM/ARMISelLowering.cpp:12215
unsigned NumLanes = Op.getValueType().getVectorNumElements();
- if (FloatBits != 32 || IntBits > 32 || NumLanes > 4) {
+ if (FloatBits != 32 || IntBits > 32 || NumLanes > 4 || NumLanes == 3) {
// These instructions only exist converting from i32 to f32. We can handle
----------------
Replicate it here?
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D58927/new/
https://reviews.llvm.org/D58927
More information about the llvm-commits
mailing list