[llvm] r355920 - [NFC][PowerPC]Assert when trying to generate directmove below P8.
Jinsong Ji via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 12 07:01:30 PDT 2019
Author: jsji
Date: Tue Mar 12 07:01:29 2019
New Revision: 355920
URL: http://llvm.org/viewvc/llvm-project?rev=355920&view=rev
Log:
[NFC][PowerPC]Assert when trying to generate directmove below P8.
This was found when we generated COPY from G8RC to F8RC in
EmitInstrWithCustomInserter without checking proper architecture,
we silently generated mtvsrd, which require P8 and up.
This is a NFC patch to add assert when we call copyPhysReg, in case
someone accidentally generate COPY between G8RC to F8RC for P7 and
below.
Modified:
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp?rev=355920&r1=355919&r2=355920&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp Tue Mar 12 07:01:29 2019
@@ -941,12 +941,16 @@ void PPCInstrInfo::copyPhysReg(MachineBa
return;
} else if (PPC::G8RCRegClass.contains(SrcReg) &&
PPC::VSFRCRegClass.contains(DestReg)) {
+ assert(Subtarget.hasDirectMove() &&
+ "Subtarget doesn't support directmove, don't know how to copy.");
BuildMI(MBB, I, DL, get(PPC::MTVSRD), DestReg).addReg(SrcReg);
NumGPRtoVSRSpill++;
getKillRegState(KillSrc);
return;
} else if (PPC::VSFRCRegClass.contains(SrcReg) &&
PPC::G8RCRegClass.contains(DestReg)) {
+ assert(Subtarget.hasDirectMove() &&
+ "Subtarget doesn't support directmove, don't know how to copy.");
BuildMI(MBB, I, DL, get(PPC::MFVSRD), DestReg).addReg(SrcReg);
getKillRegState(KillSrc);
return;
@@ -962,7 +966,6 @@ void PPCInstrInfo::copyPhysReg(MachineBa
return;
}
-
unsigned Opc;
if (PPC::GPRCRegClass.contains(DestReg, SrcReg))
Opc = PPC::OR;
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