[PATCH] D59191: [AMDGPU] Asm/disasm v_cndmask_b32_e64 with abs/neg source modifiers

[Tim Renouf via Phabricator via llvm-commits]

tpr created this revision.
Herald added subscribers: llvm-commits, t-tye, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl, arsenm, qcolombet.
Herald added a project: LLVM.

This commit allows v_cndmask_b32_e64 with abs, neg source
modifiers on src0, src1 to be assembled and disassembled.

This does appear to be allowed, even though they are floating point
modifiers and the operand type is b32.

To do this, I added src0_modifiers and src1_modifiers to the
MachineInstr, which involved fixing up several places in codegen and mir
tests.

Change-Id: I69bf4a8c73ebc65744f6110bb8fc4e937d79fbea


Repository:
  rL LLVM

https://reviews.llvm.org/D59191

Files:
  lib/Target/AMDGPU/SIFoldOperands.cpp
  lib/Target/AMDGPU/SIISelLowering.cpp
  lib/Target/AMDGPU/SIInstrInfo.cpp
  lib/Target/AMDGPU/SIInstrInfo.td
  lib/Target/AMDGPU/SIInstructions.td
  lib/Target/AMDGPU/SILowerI1Copies.cpp
  lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
  lib/Target/AMDGPU/VOP2Instructions.td
  lib/Target/AMDGPU/VOP3Instructions.td
  test/CodeGen/AMDGPU/coalescer-extend-pruned-subrange.mir
  test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir
  test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mir
  test/CodeGen/AMDGPU/coalescing-subreg-removed-undef-copy.mir
  test/CodeGen/AMDGPU/fold-cndmask.mir
  test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir
  test/CodeGen/AMDGPU/merge-load-store-vreg.mir
  test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir
  test/CodeGen/AMDGPU/regcoal-followcopychain-bogus-subrange-comparison.mir
  test/CodeGen/AMDGPU/regcoal-subrange-join-seg.mir
  test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir
  test/CodeGen/AMDGPU/subreg-split-live-in-error.mir
  test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir
  test/CodeGen/AMDGPU/waitcnt-back-edge-loop.mir
  test/MC/AMDGPU/vop3.s
  test/MC/Disassembler/AMDGPU/vop3_vi.txt

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