[llvm] r355745 - [AArch64][GlobalISel] Fix i1 arguments not being zero-extended as required by ABI.

[Amara Emerson via llvm-commits]

Author: aemerson
Date: Fri Mar  8 14:17:00 2019
New Revision: 355745

URL: http://llvm.org/viewvc/llvm-project?rev=355745&view=rev
Log:
[AArch64][GlobalISel] Fix i1 arguments not being zero-extended as required by ABI.

Fixes PR41001.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64CallLowering.cpp
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll

Modified: llvm/trunk/lib/Target/AArch64/AArch64CallLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64CallLowering.cpp?rev=355745&r1=355744&r2=355745&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64CallLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64CallLowering.cpp Fri Mar  8 14:17:00 2019
@@ -363,6 +363,9 @@ bool AArch64CallLowering::lowerCall(Mach
                       [&](unsigned Reg, uint64_t Offset) {
                         MIRBuilder.buildExtract(Reg, OrigArg.Reg, Offset);
                       });
+    // AAPCS requires that we zero-extend i1 to 8 bits by the caller.
+    if (OrigArg.Ty->isIntegerTy(1))
+      SplitArgs.back().Flags.setZExt();
   }
 
   // Find out which ABI gets to decide where things go.

Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll?rev=355745&r1=355744&r2=355745&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll Fri Mar  8 14:17:00 2019
@@ -2350,3 +2350,12 @@ define void @test_llvm.aarch64.neon.ld3.
 }
 
 declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0i32(i32*) #3
+
+define void @test_i1_arg_zext(void (i1)* %f) {
+; CHECK-LABEL: name: test_i1_arg_zext
+; CHECK: [[I1:%[0-9]+]]:_(s1) = G_CONSTANT i1 true
+; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[I1]](s1)
+; CHECK: $w0 = COPY [[ZEXT]](s32)
+  call void %f(i1 true)
+  ret void
+}