[PATCH] D59036: Memory writes overlap in the pipelined loop
Yan Luo via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 7 09:48:55 PST 2019
yan_luo updated this revision to Diff 189736.
yan_luo added a comment.
Herald added a subscriber: hiraditya.
Updated the diff.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D59036/new/
https://reviews.llvm.org/D59036
Files:
llvm/lib/CodeGen/MachinePipeliner.cpp
Index: llvm/lib/CodeGen/MachinePipeliner.cpp
===================================================================
--- llvm/lib/CodeGen/MachinePipeliner.cpp
+++ llvm/lib/CodeGen/MachinePipeliner.cpp
@@ -3131,8 +3131,7 @@
SI->hasOrderedMemoryRef() || DI->hasOrderedMemoryRef())
return true;
- // Only chain dependences between a load and store can be loop carried.
- if (!DI->mayStore() || !SI->mayLoad())
+ if (!DI->mayStore())
return false;
unsigned DeltaS, DeltaD;
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