[PATCH] D59058: [X86] Model ADC/SBB with immediate 0 more accurately in the Haswell scheduler model
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 6 15:12:52 PST 2019
craig.topper created this revision.
craig.topper added reviewers: andreadb, RKSimon.
Herald added a subscriber: gbedwell.
Haswell and possibly Sandybridge have an optimization for ADC/SBB with immediate 0 to use a single uop flow. This only applies GR16/GR32/GR64 with an 8-bit immediate. It does not apply to GR8. It also does not apply to the implicit AX/EAX/RAX forms.
https://reviews.llvm.org/D59058
Files:
lib/Target/X86/X86SchedHaswell.td
test/tools/llvm-mca/X86/Haswell/resources-x86_64.s
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