[PATCH] D58870: [X86] Enable 8-bit SHL to convert to LEA
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Tue Mar 5 10:38:07 PST 2019
This revision was automatically updated to reflect the committed changes.
Closed by commit rL355425: [X86] Enable 8-bit SHL to convert to LEA (authored by ctopper, committed by ).
Herald added a project: LLVM.
Changed prior to commit:
https://reviews.llvm.org/D58870?vs=189038&id=189358#toc
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D58870/new/
https://reviews.llvm.org/D58870
Files:
llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
llvm/trunk/lib/Target/X86/X86InstrShiftRotate.td
llvm/trunk/test/CodeGen/X86/fast-isel-shift.ll
llvm/trunk/test/CodeGen/X86/mul-constant-i8.ll
Index: llvm/trunk/lib/Target/X86/X86InstrShiftRotate.td
===================================================================
--- llvm/trunk/lib/Target/X86/X86InstrShiftRotate.td
+++ llvm/trunk/lib/Target/X86/X86InstrShiftRotate.td
@@ -30,11 +30,11 @@
[(set GR64:$dst, (shl GR64:$src1, CL))]>;
} // Uses = [CL], SchedRW
+let isConvertibleToThreeAddress = 1 in { // Can transform into LEA.
def SHL8ri : Ii8<0xC0, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1, u8imm:$src2),
"shl{b}\t{$src2, $dst|$dst, $src2}",
[(set GR8:$dst, (shl GR8:$src1, (i8 imm:$src2)))]>;
-let isConvertibleToThreeAddress = 1 in { // Can transform into LEA.
def SHL16ri : Ii8<0xC1, MRM4r, (outs GR16:$dst), (ins GR16:$src1, u8imm:$src2),
"shl{w}\t{$src2, $dst|$dst, $src2}",
[(set GR16:$dst, (shl GR16:$src1, (i8 imm:$src2)))]>,
Index: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
===================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
@@ -755,6 +755,7 @@
BuildMI(*MFI, MBBI, MI.getDebugLoc(), get(Opcode), OutRegLEA);
switch (MIOpc) {
default: llvm_unreachable("Unreachable!");
+ case X86::SHL8ri:
case X86::SHL16ri: {
unsigned ShAmt = MI.getOperand(2).getImm();
MIB.addReg(0).addImm(1ULL << ShAmt)
@@ -918,6 +919,9 @@
break;
}
+ case X86::SHL8ri:
+ Is8BitOp = true;
+ LLVM_FALLTHROUGH;
case X86::SHL16ri: {
assert(MI.getNumOperands() >= 3 && "Unknown shift instruction!");
unsigned ShAmt = getTruncatedShiftCount(MI, 2);
Index: llvm/trunk/test/CodeGen/X86/fast-isel-shift.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-shift.ll
+++ llvm/trunk/test/CodeGen/X86/fast-isel-shift.ll
@@ -157,8 +157,8 @@
define i8 @shl_imm1_i8(i8 %a) {
; CHECK-LABEL: shl_imm1_i8:
; CHECK: ## %bb.0:
-; CHECK-NEXT: movl %edi, %eax
-; CHECK-NEXT: shlb $1, %al
+; CHECK-NEXT: ## kill: def $edi killed $edi def $rdi
+; CHECK-NEXT: leal (,%rdi,2), %eax
; CHECK-NEXT: ## kill: def $al killed $al killed $eax
; CHECK-NEXT: retq
%c = shl i8 %a, 1
Index: llvm/trunk/test/CodeGen/X86/mul-constant-i8.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/mul-constant-i8.ll
+++ llvm/trunk/test/CodeGen/X86/mul-constant-i8.ll
@@ -36,8 +36,8 @@
define i8 @test_mul_by_4(i8 %x) {
; X64-LABEL: test_mul_by_4:
; X64: # %bb.0:
-; X64-NEXT: movl %edi, %eax
-; X64-NEXT: shlb $2, %al
+; X64-NEXT: # kill: def $edi killed $edi def $rdi
+; X64-NEXT: leal (,%rdi,4), %eax
; X64-NEXT: # kill: def $al killed $al killed $eax
; X64-NEXT: retq
%m = mul i8 %x, 4
@@ -82,8 +82,8 @@
define i8 @test_mul_by_8(i8 %x) {
; X64-LABEL: test_mul_by_8:
; X64: # %bb.0:
-; X64-NEXT: movl %edi, %eax
-; X64-NEXT: shlb $3, %al
+; X64-NEXT: # kill: def $edi killed $edi def $rdi
+; X64-NEXT: leal (,%rdi,8), %eax
; X64-NEXT: # kill: def $al killed $al killed $eax
; X64-NEXT: retq
%m = mul i8 %x, 8
@@ -449,8 +449,8 @@
define i8 @test_mul_by_520(i8 %x) {
; X64-LABEL: test_mul_by_520:
; X64: # %bb.0:
-; X64-NEXT: movl %edi, %eax
-; X64-NEXT: shlb $3, %al
+; X64-NEXT: # kill: def $edi killed $edi def $rdi
+; X64-NEXT: leal (,%rdi,8), %eax
; X64-NEXT: # kill: def $al killed $al killed $eax
; X64-NEXT: retq
%m = mul i8 %x, 520
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