[PATCH] D58884: [DAGCombiner][X86][SystemZ][AArch64] Combine some cases of (bitcast (build_vector constants)) between legalize types and legalize dag.

Ulrich Weigand via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 4 06:10:01 PST 2019


uweigand added inline comments.


================
Comment at: test/CodeGen/SystemZ/vec-extract-01.ll:9
+; CHECK: llihf [[REG:%r[0-5]]], 1000000
+; CHECK: oilf [[REG]], 99999
 ; CHECK: stg [[REG]], 0(%r2)
----------------
spatel wrote:
> cc @uweigand @jonpa to confirm this diff is ok.
The new code is certainly correct.  Performance-wise it's probably a wash: we now need two instructions instead of one, but on the other hand we're avoiding a memory access ...

But that's a separate discussion to be had, since if we prefer the constant pool access we should also use it when loading an integer constant to begin with.

So this patch, which simply treats integer constant loads and vector constant loads the same here, should be OK in any case.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D58884/new/

https://reviews.llvm.org/D58884





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