[PATCH] D56828: [ELF] Simplify RelRo, TLS, NOBITS section ranks and make RW PT_LOAD start with RelRo
Fangrui Song via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Mar 2 05:07:02 PST 2019
MaskRay updated this revision to Diff 189046.
MaskRay retitled this revision from "[ELF] Make RW PT_LOAD start with PT_GNU_RELRO sections" to "[ELF] Simplify RelRo, TLS, NOBITS section ranks and make RW PT_LOAD start with RelRo".
MaskRay edited the summary of this revision.
MaskRay removed a reviewer: pcc.
MaskRay removed a subscriber: jdoerfert.
MaskRay added a comment.
Retitle
Repository:
rLLD LLVM Linker
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D56828/new/
https://reviews.llvm.org/D56828
Files:
ELF/Writer.cpp
Index: ELF/Writer.cpp
===================================================================
--- ELF/Writer.cpp
+++ ELF/Writer.cpp
@@ -725,16 +725,15 @@
// * It is easy to check if a give branch was taken.
// * It is easy two see how similar two ranks are (see getRankProximity).
enum RankFlags {
- RF_NOT_ADDR_SET = 1 << 18,
- RF_NOT_ALLOC = 1 << 17,
- RF_NOT_INTERP = 1 << 16,
- RF_NOT_NOTE = 1 << 15,
- RF_WRITE = 1 << 14,
- RF_EXEC_WRITE = 1 << 13,
- RF_EXEC = 1 << 12,
- RF_RODATA = 1 << 11,
- RF_NON_TLS_BSS = 1 << 10,
- RF_NON_TLS_BSS_RO = 1 << 9,
+ RF_NOT_ADDR_SET = 1 << 17,
+ RF_NOT_ALLOC = 1 << 16,
+ RF_NOT_INTERP = 1 << 15,
+ RF_NOT_NOTE = 1 << 14,
+ RF_WRITE = 1 << 13,
+ RF_EXEC_WRITE = 1 << 12,
+ RF_EXEC = 1 << 11,
+ RF_RODATA = 1 << 10,
+ RF_NOT_RELRO = 1 << 9,
RF_NOT_TLS = 1 << 8,
RF_BSS = 1 << 7,
RF_PPC_NOT_TOCBSS = 1 << 6,
@@ -805,35 +804,24 @@
// If we got here we know that both A and B are in the same PT_LOAD.
- bool IsTls = Sec->Flags & SHF_TLS;
- bool IsNoBits = Sec->Type == SHT_NOBITS;
-
- // The first requirement we have is to put (non-TLS) nobits sections last. The
- // reason is that the only thing the dynamic linker will see about them is a
- // p_memsz that is larger than p_filesz. Seeing that it zeros the end of the
- // PT_LOAD, so that has to correspond to the nobits sections.
- bool IsNonTlsNoBits = IsNoBits && !IsTls;
- if (IsNonTlsNoBits)
- Rank |= RF_NON_TLS_BSS;
-
- // We place nobits RelRo sections before plain r/w ones, and non-nobits RelRo
- // sections after r/w ones, so that the RelRo sections are contiguous.
- bool IsRelRo = isRelroSection(Sec);
- if (IsNonTlsNoBits && !IsRelRo)
- Rank |= RF_NON_TLS_BSS_RO;
- if (!IsNonTlsNoBits && IsRelRo)
- Rank |= RF_NON_TLS_BSS_RO;
+ // Place RelRo sections first so that the PT_LOAD starts with PT_GNU_RELRO
+ // sections.
+ if (!isRelroSection(Sec))
+ Rank |= RF_NOT_RELRO;
// The TLS initialization block needs to be a single contiguous block in a R/W
// PT_LOAD, so stick TLS sections directly before the other RelRo R/W
// sections. The TLS NOBITS sections are placed here as they don't take up
// virtual address space in the PT_LOAD.
- if (!IsTls)
+ if (!(Sec->Flags & SHF_TLS))
Rank |= RF_NOT_TLS;
- // Within the TLS initialization block, the non-nobits sections need to appear
- // first.
- if (IsNoBits)
+ // Within TLS sections, or within other RelRo sections, or within non-RelRo
+ // sections, place non-nobits sections first.
+ //
+ // After considering RelRo and SHT_NOBITS, the layout is .data.rel.ro
+ // .bss.rel.ro .data .bss
+ if (Sec->Type == SHT_NOBITS)
Rank |= RF_BSS;
// Some architectures have additional ordering restrictions for sections
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