[llvm] r355187 - [Tablegen] Add support for the !mul operator.
Nicola Zaghen via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 1 01:46:29 PST 2019
Author: nzaghen
Date: Fri Mar 1 01:46:29 2019
New Revision: 355187
URL: http://llvm.org/viewvc/llvm-project?rev=355187&view=rev
Log:
[Tablegen] Add support for the !mul operator.
This is a small addition to arithmetic operations that improves
expressiveness of the language.
Differential Revision: https://reviews.llvm.org/D58775
Modified:
llvm/trunk/docs/TableGen/LangIntro.rst
llvm/trunk/docs/TableGen/LangRef.rst
llvm/trunk/include/llvm/TableGen/Record.h
llvm/trunk/lib/TableGen/Record.cpp
llvm/trunk/lib/TableGen/TGLexer.cpp
llvm/trunk/lib/TableGen/TGLexer.h
llvm/trunk/lib/TableGen/TGParser.cpp
llvm/trunk/test/TableGen/math.td
Modified: llvm/trunk/docs/TableGen/LangIntro.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/TableGen/LangIntro.rst?rev=355187&r1=355186&r2=355187&view=diff
==============================================================================
--- llvm/trunk/docs/TableGen/LangIntro.rst (original)
+++ llvm/trunk/docs/TableGen/LangIntro.rst Fri Mar 1 01:46:29 2019
@@ -284,7 +284,7 @@ supported include:
The usual shift operators. Operations are on 64-bit integers, the result
is undefined for shift counts outside [0, 63].
-``!add(a,b,...)`` ``!and(a,b,...)`` ``!or(a,b,...)``
+``!add(a,b,...)`` ``!mul(a,b,...)`` ``!and(a,b,...)`` ``!or(a,b,...)``
The usual arithmetic and binary operators.
Note that all of the values have rules specifying how they convert to values
Modified: llvm/trunk/docs/TableGen/LangRef.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/TableGen/LangRef.rst?rev=355187&r1=355186&r2=355187&view=diff
==============================================================================
--- llvm/trunk/docs/TableGen/LangRef.rst (original)
+++ llvm/trunk/docs/TableGen/LangRef.rst Fri Mar 1 01:46:29 2019
@@ -100,7 +100,7 @@ wide variety of meanings:
:!or !empty !subst !foreach !strconcat
:!cast !listconcat !size !foldl
:!isa !dag !le !lt !ge
- :!gt !ne
+ :!gt !ne !mul
TableGen also has !cond operator that needs a slightly different
syntax compared to other "bang operators":
Modified: llvm/trunk/include/llvm/TableGen/Record.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/TableGen/Record.h?rev=355187&r1=355186&r2=355187&view=diff
==============================================================================
--- llvm/trunk/include/llvm/TableGen/Record.h (original)
+++ llvm/trunk/include/llvm/TableGen/Record.h Fri Mar 1 01:46:29 2019
@@ -798,7 +798,7 @@ public:
/// !op (X, Y) - Combine two inits.
class BinOpInit : public OpInit, public FoldingSetNode {
public:
- enum BinaryOp : uint8_t { ADD, AND, OR, SHL, SRA, SRL, LISTCONCAT,
+ enum BinaryOp : uint8_t { ADD, MUL, AND, OR, SHL, SRA, SRL, LISTCONCAT,
STRCONCAT, CONCAT, EQ, NE, LE, LT, GE, GT };
private:
Modified: llvm/trunk/lib/TableGen/Record.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/TableGen/Record.cpp?rev=355187&r1=355186&r2=355187&view=diff
==============================================================================
--- llvm/trunk/lib/TableGen/Record.cpp (original)
+++ llvm/trunk/lib/TableGen/Record.cpp Fri Mar 1 01:46:29 2019
@@ -930,6 +930,7 @@ Init *BinOpInit::Fold(Record *CurRec) co
break;
}
case ADD:
+ case MUL:
case AND:
case OR:
case SHL:
@@ -945,6 +946,7 @@ Init *BinOpInit::Fold(Record *CurRec) co
switch (getOpcode()) {
default: llvm_unreachable("Bad opcode!");
case ADD: Result = LHSv + RHSv; break;
+ case MUL: Result = LHSv * RHSv; break;
case AND: Result = LHSv & RHSv; break;
case OR: Result = LHSv | RHSv; break;
case SHL: Result = LHSv << RHSv; break;
@@ -974,6 +976,7 @@ std::string BinOpInit::getAsString() con
switch (getOpcode()) {
case CONCAT: Result = "!con"; break;
case ADD: Result = "!add"; break;
+ case MUL: Result = "!mul"; break;
case AND: Result = "!and"; break;
case OR: Result = "!or"; break;
case SHL: Result = "!shl"; break;
Modified: llvm/trunk/lib/TableGen/TGLexer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/TableGen/TGLexer.cpp?rev=355187&r1=355186&r2=355187&view=diff
==============================================================================
--- llvm/trunk/lib/TableGen/TGLexer.cpp (original)
+++ llvm/trunk/lib/TableGen/TGLexer.cpp Fri Mar 1 01:46:29 2019
@@ -552,6 +552,7 @@ tgtok::TokKind TGLexer::LexExclaim() {
.Case("con", tgtok::XConcat)
.Case("dag", tgtok::XDag)
.Case("add", tgtok::XADD)
+ .Case("mul", tgtok::XMUL)
.Case("and", tgtok::XAND)
.Case("or", tgtok::XOR)
.Case("shl", tgtok::XSHL)
Modified: llvm/trunk/lib/TableGen/TGLexer.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/TableGen/TGLexer.h?rev=355187&r1=355186&r2=355187&view=diff
==============================================================================
--- llvm/trunk/lib/TableGen/TGLexer.h (original)
+++ llvm/trunk/lib/TableGen/TGLexer.h Fri Mar 1 01:46:29 2019
@@ -49,9 +49,9 @@ namespace tgtok {
MultiClass, String, Defset,
// !keywords.
- XConcat, XADD, XAND, XOR, XSRA, XSRL, XSHL, XListConcat, XStrConcat, XCast,
- XSubst, XForEach, XFoldl, XHead, XTail, XSize, XEmpty, XIf, XCond, XEq, XIsA, XDag,
- XNe, XLe, XLt, XGe, XGt,
+ XConcat, XADD, XMUL, XAND, XOR, XSRA, XSRL, XSHL, XListConcat, XStrConcat,
+ XCast, XSubst, XForEach, XFoldl, XHead, XTail, XSize, XEmpty, XIf, XCond,
+ XEq, XIsA, XDag, XNe, XLe, XLt, XGe, XGt,
// Integer value.
IntVal,
Modified: llvm/trunk/lib/TableGen/TGParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/TableGen/TGParser.cpp?rev=355187&r1=355186&r2=355187&view=diff
==============================================================================
--- llvm/trunk/lib/TableGen/TGParser.cpp (original)
+++ llvm/trunk/lib/TableGen/TGParser.cpp Fri Mar 1 01:46:29 2019
@@ -1023,6 +1023,7 @@ Init *TGParser::ParseOperation(Record *C
case tgtok::XConcat:
case tgtok::XADD:
+ case tgtok::XMUL:
case tgtok::XAND:
case tgtok::XOR:
case tgtok::XSRA:
@@ -1045,6 +1046,7 @@ Init *TGParser::ParseOperation(Record *C
default: llvm_unreachable("Unhandled code!");
case tgtok::XConcat: Code = BinOpInit::CONCAT; break;
case tgtok::XADD: Code = BinOpInit::ADD; break;
+ case tgtok::XMUL: Code = BinOpInit::MUL; break;
case tgtok::XAND: Code = BinOpInit::AND; break;
case tgtok::XOR: Code = BinOpInit::OR; break;
case tgtok::XSRA: Code = BinOpInit::SRA; break;
@@ -1075,6 +1077,7 @@ Init *TGParser::ParseOperation(Record *C
case tgtok::XSRL:
case tgtok::XSHL:
case tgtok::XADD:
+ case tgtok::XMUL:
Type = IntRecTy::get();
ArgType = IntRecTy::get();
break;
@@ -1154,7 +1157,8 @@ Init *TGParser::ParseOperation(Record *C
}
if (Code != BinOpInit::ADD && Code != BinOpInit::AND &&
Code != BinOpInit::OR && Code != BinOpInit::SRA &&
- Code != BinOpInit::SRL && Code != BinOpInit::SHL)
+ Code != BinOpInit::SRL && Code != BinOpInit::SHL &&
+ Code != BinOpInit::MUL)
ArgType = Resolved;
}
@@ -1176,7 +1180,8 @@ Init *TGParser::ParseOperation(Record *C
// shorthand for nesting them.
if (Code == BinOpInit::STRCONCAT || Code == BinOpInit::LISTCONCAT ||
Code == BinOpInit::CONCAT || Code == BinOpInit::ADD ||
- Code == BinOpInit::AND || Code == BinOpInit::OR) {
+ Code == BinOpInit::AND || Code == BinOpInit::OR ||
+ Code == BinOpInit::MUL) {
while (InitList.size() > 2) {
Init *RHS = InitList.pop_back_val();
RHS = (BinOpInit::get(Code, InitList.back(), RHS, Type))->Fold(CurRec);
@@ -2007,6 +2012,7 @@ Init *TGParser::ParseSimpleValue(Record
case tgtok::XConcat:
case tgtok::XDag:
case tgtok::XADD:
+ case tgtok::XMUL:
case tgtok::XAND:
case tgtok::XOR:
case tgtok::XSRA:
Modified: llvm/trunk/test/TableGen/math.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/math.td?rev=355187&r1=355186&r2=355187&view=diff
==============================================================================
--- llvm/trunk/test/TableGen/math.td (original)
+++ llvm/trunk/test/TableGen/math.td Fri Mar 1 01:46:29 2019
@@ -35,6 +35,10 @@ def v1025 : Int<!add(v1024.Value, 1)>;
// CHECK: def v1025
// CHECK: Value = 1025
+// CHECK: def v12
+// CHECK: Value = 12
+def v12 : Int<!mul(4, 3)>;
+
// CHECK: def v1a
// CHECK: Value = 1
@@ -62,3 +66,11 @@ def v3072 : Int<!or(v1024.Value, v2048.V
def v4 : Int<!add(v2.Value, 1, v1.Value)>;
def v7 : Int<!or(v1.Value, v2.Value, v4.Value)>;
def v1a : Int<!and(v7.Value, 5, v1.Value)>;
+
+// CHECK: def v84
+// CHECK: Value = 84
+def v84 : Int<!mul(v12.Value, v7.Value)>;
+
+// CHECK: def v924
+// CHECK: Value = 924
+def v924 : Int<!mul(v84.Value, 11)>;
More information about the llvm-commits
mailing list