[PATCH] D58760: [AtomicExpand] Allow libcall expansion for non-zero address spaces

[Philip Reames via Phabricator via llvm-commits]

reames created this revision.
reames added a reviewer: arsenm.
Herald added subscribers: jfb, bollu, wdng, mcrosier.

Question to reviewers: is this a good idea?  The particular case which caused me to notice this was an unrelated bug which resulted in a misaligned atomic being lowered (i.e. shouldn't have happened), but it seems consistent to lower to libcalls just as we'd lower to normal instructions.  Thoughts?


https://reviews.llvm.org/D58760

Files:
  lib/CodeGen/AtomicExpandPass.cpp
  test/Transforms/AtomicExpand/X86/expand-atomic-libcall.ll


Index: test/Transforms/AtomicExpand/X86/expand-atomic-libcall.ll
===================================================================
--- test/Transforms/AtomicExpand/X86/expand-atomic-libcall.ll
+++ test/Transforms/AtomicExpand/X86/expand-atomic-libcall.ll
@@ -0,0 +1,36 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -mtriple=i686-linux-gnu -atomic-expand %s | FileCheck %s
+
+
+define i256 @atomic_load256_libcall(i256* %ptr) nounwind {
+; CHECK-LABEL: @atomic_load256_libcall(
+; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i256* [[PTR:%.*]] to i8*
+; CHECK-NEXT:    [[TMP2:%.*]] = alloca i256, align 8
+; CHECK-NEXT:    [[TMP3:%.*]] = bitcast i256* [[TMP2]] to i8*
+; CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 32, i8* [[TMP3]])
+; CHECK-NEXT:    call void @__atomic_load(i64 32, i8* [[TMP1]], i8* [[TMP3]], i32 0)
+; CHECK-NEXT:    [[TMP4:%.*]] = load i256, i256* [[TMP2]], align 8
+; CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 32, i8* [[TMP3]])
+; CHECK-NEXT:    ret i256 [[TMP4]]
+;
+  %result = load atomic i256, i256* %ptr unordered, align 16
+  ret i256 %result
+}
+
+define i256 @atomic_load256_libcall_as1(i256 addrspace(1)* %ptr) nounwind {
+; CHECK-LABEL: @atomic_load256_libcall_as1(
+; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i256 addrspace(1)* [[PTR:%.*]] to i8 addrspace(1)*
+; CHECK-NEXT:    [[TMP2:%.*]] = addrspacecast i8 addrspace(1)* [[TMP1]] to i8*
+; CHECK-NEXT:    [[TMP3:%.*]] = alloca i256, align 8
+; CHECK-NEXT:    [[TMP4:%.*]] = bitcast i256* [[TMP3]] to i8*
+; CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 32, i8* [[TMP4]])
+; CHECK-NEXT:    call void @__atomic_load(i64 32, i8* [[TMP2]], i8* [[TMP4]], i32 0)
+; CHECK-NEXT:    [[TMP5:%.*]] = load i256, i256* [[TMP3]], align 8
+; CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 32, i8* [[TMP4]])
+; CHECK-NEXT:    ret i256 [[TMP5]]
+;
+  %result = load atomic i256, i256 addrspace(1)* %ptr unordered, align 16
+  ret i256 %result
+}
+
+; CHECK: fail
Index: lib/CodeGen/AtomicExpandPass.cpp
===================================================================
--- lib/CodeGen/AtomicExpandPass.cpp
+++ lib/CodeGen/AtomicExpandPass.cpp
@@ -1691,8 +1691,14 @@
   }
 
   // 'ptr' argument.
-  Value *PtrVal =
-      Builder.CreateBitCast(PointerOperand, Type::getInt8PtrTy(Ctx));
+  // note: This assumes all address spaces share a common libfunc
+  // implementation and that addresses are convertable.  For systems without
+  // that property, we'd need to extend this mechanism to support AS-specific
+  // families of atomic intrinsics.
+  auto PtrTypeAS = PointerOperand->getType()->getPointerAddressSpace();
+  Value *PtrVal = Builder.CreateBitCast(PointerOperand,
+                                        Type::getInt8PtrTy(Ctx, PtrTypeAS));
+  PtrVal = Builder.CreateAddrSpaceCast(PtrVal, Type::getInt8PtrTy(Ctx));
   Args.push_back(PtrVal);
 
   // 'expected' argument, if present.


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