[PATCH] D58738: [SelectionDAG] Strengthen assertions about usage of AtomicSDNodes

[Philip Reames via Phabricator via llvm-commits]

reames created this revision.
reames added reviewers: jlebar, asb, arsenm, tstellar, jfb.
Herald added subscribers: bollu, tpr, wdng, mcrosier.
reames updated this revision to Diff 188620.
reames added a comment.

I somehow uploaded entirely the wrong patch... oops.


In D57601 <https://reviews.llvm.org/D57601>, I described the expectations around usage of AtomicSDNode and LoadSDNode/StoreSDNode w.r.t. atomic and volatiles.  This patch simply embeds those expectations in assertions so that they can't be accidentally weakened.

Note: The reason only AtomicSDNodes of ATOMIC_LOAD and ATOMIC_STORE opcode are currently checked is that AMDGPU has an intrinsic which gets lowered to an ATOMIC_LOAD_FADD w/o a corresponding atomic MMO.  This is suspicious, and I've brought it to the attention of the relevant developers.  Once resolved, I'll strengthen that assertion.

Note 2: If this breaks your out-of-tree backend, go read the update instructions associated w/the previously mentioned patch.  This will assert on (a subset of) things you need to update per those instructions.


https://reviews.llvm.org/D58738

Files:
  include/llvm/CodeGen/SelectionDAGNodes.h


Index: include/llvm/CodeGen/SelectionDAGNodes.h
===================================================================
--- include/llvm/CodeGen/SelectionDAGNodes.h
+++ include/llvm/CodeGen/SelectionDAGNodes.h
@@ -1385,7 +1385,10 @@
 public:
   AtomicSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTL,
                EVT MemVT, MachineMemOperand *MMO)
-      : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {}
+    : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
+    assert(((Opc != ISD::ATOMIC_LOAD && Opc != ISD::ATOMIC_STORE) ||
+            MMO->isAtomic()) && "then why are we using an AtomicSDNode?");
+  }
 
   const SDValue &getBasePtr() const { return getOperand(1); }
   const SDValue &getVal() const { return getOperand(2); }
@@ -2138,6 +2141,8 @@
       : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
     LSBaseSDNodeBits.AddressingMode = AM;
     assert(getAddressingMode() == AM && "Value truncated");
+    assert((!MMO->isAtomic() || MMO->isVolatile()) &&
+           "use an AtomicSDNode instead for non-volatile atomics");
   }
 
   const SDValue &getOffset() const {


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