[PATCH] D58703: [x86] convert anyext of pinsrb scalar op to subreg insert

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

The fast-isel loads don't fold because we run the argument lowering and the rest of the code through selectiondag separately during fast-isel. So selectiondag doesn't see them together to fold the load during isel. Then we can't fold them during peephole because there is an INSERT_SUBREG between the MOVB and the PINSRB and the memory folding code can't handle that.  Prior to this patch we had a MOVB, followed by a MOVZX, then the PINSRB at the time of peephole. Peephole pass did merge the MOVB and the MOVZX, but MOVZX isn't a foldable load so we don't go any further to merge with the PINSRB.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D58703/new/

https://reviews.llvm.org/D58703