[PATCH] D58703: [x86] convert anyext of pinsrb scalar op to subreg insert

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 26 18:34:44 PST 2019


craig.topper added a comment.

I'm not convinced that the dependency logic in the frontend and the renaming portion of Intel CPUs know that this instruction only uses the lower 8 bits. Same with BT/BTC/BTR/BTS/SHLX/SHRX/SARX and probably others. On Sandy Bridge and later CPUs, probably the worst this means is that it would force an AH/BH/CH/DH merge if it had been written independently previously. Bits 63:16 and 7:0 are always together. In 64-bit mode that should never really happen since we won't consider the AH/BH/CH/DH for general use by the register allocator.


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  https://reviews.llvm.org/D58703/new/

https://reviews.llvm.org/D58703





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