[PATCH] D55287: VirtRegMap: Support partially allocated virtual registers
Quentin Colombet via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 25 09:43:10 PST 2019
qcolombet added inline comments.
================
Comment at: lib/CodeGen/VirtRegMap.cpp:624
+ }
+ }
+ }
----------------
arsenm wrote:
> qcolombet wrote:
> > Although that's unlikely to happen, we could imagine that another physical reg that share regunits with the one we are clearing is still relevant for subsequence allocation.
> >
> > Put differently, why is this code valid?
> >
> > In theory we may clear RegA's regunits, while they overlap with RegB's regunits and RegB's live interval needs to be valid.
> For the real use case I have, that can't happen. If these aren't removed, there will be a huge amount of work to maintain these accurately on the off chance this happens. I think this should just be documented as a restriction for the register class filter functions. If one regunit is disabled, any register class that has a register overlapping that regunit also needs to be disabled.
I was thinking along the same line.
Could you think of some assert that we could use to make sure this doesn't happen?
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https://reviews.llvm.org/D55287/new/
https://reviews.llvm.org/D55287
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