[PATCH] D55506: [RFC v2] Allow target to handle STRICT floating-point nodes

[Kevin P. Neal via Phabricator via llvm-commits]

kpn added a comment.

In D55506#1408435 <https://reviews.llvm.org/D55506#1408435>, @wuzish wrote:

> I think we can have a flag to indicate rounding mode for float operator such as FADD instead of STRICT_FADD, because STRICT_FADD does have side effect(chain), but some target (eg. RISCV) has static rounding mode encoded in the instruction which does not side effect. Then we can optimize specific STRICT_FADD node which ignoring exception into normal FADD with corresponding static round mode.


WRT the chain: "That's not a bug, that's a feature!"

The chain prevents reordering of floating point instructions by the SelectionDAG. That makes it required.

Some System/Z floating point instructions can take an optional per-instruction rounding mode encoded in the instruction. This does not eliminate the need for strict ordering of floating point operations.


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