[PATCH] D58595: [TableGen][SelectionDAG][X86] Add specific isel matchers for immAllZerosV/immAllOnesV. Remove bitcasts from X86 patterns that are no longer necessary.
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 25 03:57:56 PST 2019
RKSimon added inline comments.
================
Comment at: utils/TableGen/CodeGenDAGPatterns.cpp:1335
+ else if (isImmAllOnesAllZerosMatch(Child))
+ Size += 4;
else if (!Child->getPredicateCalls().empty())
----------------
Add a comment describing the size?
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rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D58595/new/
https://reviews.llvm.org/D58595
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