[llvm] r354676 - [DAGCombine] Fold overlapping constant stores
Mikael Holmén via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 25 02:03:18 PST 2019
It's when doing this:
APInt InsertVal = C->getAPIntValue().zextOrTrunc(STByteSize * 8);
that STByteSize is 0 and we hit the assert.
ST is
t6: ch = store<(store 1 into `i1* null`)> t4, Constant:i1<0>,
Constant:i64<0>, undef:i64
/Mikael
On 2/25/19 10:41 AM, Mikael Holmén via llvm-commits wrote:
> Hi Nirav,
>
> The following starts crashing with this commit:
>
> llc -march=x86-64 -mcpu=corei7 -o /dev/null crash.ll
>
> with crash.ll being
>
> target triple = "x86_64-unknown-linux-gnu"
>
> define void @autogen_SD9730() {
> BB:
> store i32 -1, i32* null
> store i1 false, i1* null
> ret void
> }
>
> gives
>
> llc: ../lib/Support/APInt.cpp:812: llvm::APInt
> llvm::APInt::trunc(unsigned int) const: Assertion `width && "Can't
> truncate to 0 bits"' failed.
> Stack dump:
> 0. Program arguments: build-all/bin/llc -march=x86-64 -mcpu=corei7
> -o /dev/null crash.ll
> 1. Running pass 'Function Pass Manager' on module 'crash.ll'.
> 2. Running pass 'X86 DAG->DAG Instruction Selection' on function
> '@autogen_SD9730'
> #0 0x000000000221a2d4 PrintStackTraceSignalHandler(void*)
> (build-all/bin/llc+0x221a2d4)
> #1 0x00000000022182c0 llvm::sys::RunSignalHandlers()
> (build-all/bin/llc+0x22182c0)
> #2 0x000000000221a638 SignalHandler(int) (build-all/bin/llc+0x221a638)
> #3 0x00007fcb300f4330 __restore_rt
> (/lib/x86_64-linux-gnu/libpthread.so.0+0x10330)
> #4 0x00007fcb2ece3c37 gsignal
> /build/eglibc-ripdx6/eglibc-2.19/signal/../nptl/sysdeps/unix/sysv/linux/raise.c:56:0
> #5 0x00007fcb2ece7028 abort
> /build/eglibc-ripdx6/eglibc-2.19/stdlib/abort.c:91:0
> #6 0x00007fcb2ecdcbf6 __assert_fail_base
> /build/eglibc-ripdx6/eglibc-2.19/assert/assert.c:92:0
> #7 0x00007fcb2ecdcca2 (/lib/x86_64-linux-gnu/libc.so.6+0x2fca2)
> #8 0x00000000021aacbf (build-all/bin/llc+0x21aacbf)
> #9 0x00000000021aaffc llvm::APInt::zextOrTrunc(unsigned int) const
> (build-all/bin/llc+0x21aaffc)
> #10 0x0000000001f85bf2 (anonymous
> namespace)::DAGCombiner::visitSTORE(llvm::SDNode*)
> (build-all/bin/llc+0x1f85bf2)
> #11 0x0000000001f39fc5 (anonymous
> namespace)::DAGCombiner::visit(llvm::SDNode*) (build-all/bin/llc+0x1f39fc5)
> #12 0x0000000001f3408c (anonymous
> namespace)::DAGCombiner::combine(llvm::SDNode*)
> (build-all/bin/llc+0x1f3408c)
> #13 0x0000000001f33868 llvm::SelectionDAG::Combine(llvm::CombineLevel,
> llvm::AAResults*, llvm::CodeGenOpt::Level) (build-all/bin/llc+0x1f33868)
> #14 0x00000000020c1b8a llvm::SelectionDAGISel::CodeGenAndEmitDAG()
> (build-all/bin/llc+0x20c1b8a)
> #15 0x00000000020c00fc
> llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&)
> (build-all/bin/llc+0x20c00fc)
> #16 0x00000000020bc12c
> llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&)
> (build-all/bin/llc+0x20bc12c)
> #17 0x0000000001354c8e (anonymous
> namespace)::X86DAGToDAGISel::runOnMachineFunction(llvm::MachineFunction&)
> (build-all/bin/llc+0x1354c8e)
> #18 0x00000000018d3f4d
> llvm::MachineFunctionPass::runOnFunction(llvm::Function&)
> (build-all/bin/llc+0x18d3f4d)
> #19 0x0000000001c0d97d
> llvm::FPPassManager::runOnFunction(llvm::Function&)
> (build-all/bin/llc+0x1c0d97d)
> #20 0x0000000001c0dc38 llvm::FPPassManager::runOnModule(llvm::Module&)
> (build-all/bin/llc+0x1c0dc38)
> #21 0x0000000001c0e09a llvm::legacy::PassManagerImpl::run(llvm::Module&)
> (build-all/bin/llc+0x1c0e09a)
> #22 0x00000000007441a4 compileModule(char**, llvm::LLVMContext&)
> (build-all/bin/llc+0x7441a4)
> #23 0x0000000000741910 main (build-all/bin/llc+0x741910)
> #24 0x00007fcb2eccef45 __libc_start_main
> /build/eglibc-ripdx6/eglibc-2.19/csu/libc-start.c:321:0
> #25 0x000000000073f76a _start (build-all/bin/llc+0x73f76a)
> Abort
>
> Found using llvm-stress.
>
> /Mikael
>
> On 2/22/19 5:00 PM, Nirav Dave via llvm-commits wrote:
>> Author: niravd
>> Date: Fri Feb 22 08:00:19 2019
>> New Revision: 354676
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=354676&view=rev
>> Log:
>> [DAGCombine] Fold overlapping constant stores
>>
>> Fold a smaller constant store into larger constant stores immediately
>> preceeding it.
>>
>> Reviewers: rnk, courbet
>>
>> Subscribers: javed.absar, hiraditya, llvm-commits
>>
>> Tags: #llvm
>>
>> Differential Revision: https://reviews.llvm.org/D58468
>>
>> Modified:
>> llvm/trunk/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h
>> llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
>> llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp
>> llvm/trunk/test/CodeGen/AArch64/ldst-paired-aliasing.ll
>> llvm/trunk/test/CodeGen/PowerPC/constant-combines.ll
>> llvm/trunk/test/CodeGen/X86/stores-merging.ll
>>
>> Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h?rev=354676&r1=354675&r2=354676&view=diff
>> ==============================================================================
>> --- llvm/trunk/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h (original)
>> +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h Fri Feb 22 08:00:19 2019
>> @@ -63,7 +63,13 @@ public:
>> // Returns true if `Other` (with size `OtherSize`) can be proven to be fully
>> // contained in `*this` (with size `Size`).
>> bool contains(int64_t Size, const BaseIndexOffset &Other, int64_t OtherSize,
>> - const SelectionDAG &DAG) const;
>> + const SelectionDAG &DAG) const {
>> + int64_t Offset;
>> + return contains(Size, Other, OtherSize, DAG, Offset);
>> + }
>> +
>> + bool contains(int64_t Size, const BaseIndexOffset &Other, int64_t OtherSize,
>> + const SelectionDAG &DAG, int64_t &Offset) const;
>>
>> // Returns true `BasePtr0` and `BasePtr1` can be proven to alias/not alias, in
>> // which case `IsAlias` is set to true/false.
>>
>> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=354676&r1=354675&r2=354676&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
>> +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Fri Feb 22 08:00:19 2019
>> @@ -15437,6 +15437,32 @@ SDValue DAGCombiner::visitSTORE(SDNode *
>> CombineTo(ST1, ST1->getChain());
>> return SDValue();
>> }
>> +
>> + // If ST stores to a subset of preceeding store's write set, we may be
>> + // able to fold ST's value into the preceeding stored value. As we know
>> + // the other uses of ST1's chain are unconcerned with ST, this folding
>> + // will not affect those nodes.
>> + int64_t Offset;
>> + if (ChainBase.contains(ChainByteSize, STBase, STByteSize, DAG,
>> + Offset)) {
>> + SDValue ChainValue = ST1->getValue();
>> + if (auto *C1 = dyn_cast<ConstantSDNode>(ChainValue)) {
>> + if (auto *C = dyn_cast<ConstantSDNode>(Value)) {
>> + APInt Val = C1->getAPIntValue();
>> + APInt InsertVal = C->getAPIntValue().zextOrTrunc(STByteSize * 8);
>> + if (DAG.getDataLayout().isBigEndian())
>> + Offset = ChainByteSize - 1 - Offset;
>> + Val.insertBits(InsertVal, Offset * 8);
>> + SDValue NewSDVal =
>> + DAG.getConstant(Val, SDLoc(C), ChainValue.getValueType(),
>> + C1->isTargetOpcode(), C1->isOpaque());
>> + SDNode *NewST1 = DAG.UpdateNodeOperands(
>> + ST1, ST1->getChain(), NewSDVal, ST1->getOperand(2),
>> + ST1->getOperand(3));
>> + return CombineTo(ST, SDValue(NewST1, 0));
>> + }
>> + }
>> + } // End ST subset of ST1 case.
>> }
>> }
>> }
>>
>> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp?rev=354676&r1=354675&r2=354676&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp (original)
>> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp Fri Feb 22 08:00:19 2019
>> @@ -136,9 +136,8 @@ bool BaseIndexOffset::computeAliasing(co
>> }
>>
>> bool BaseIndexOffset::contains(int64_t Size, const BaseIndexOffset &Other,
>> - int64_t OtherSize,
>> - const SelectionDAG &DAG) const {
>> - int64_t Offset;
>> + int64_t OtherSize, const SelectionDAG &DAG,
>> + int64_t &Offset) const {
>> if (!equalBaseIndex(Other, DAG, Offset))
>> return false;
>> if (Offset >= 0) {
>>
>> Modified: llvm/trunk/test/CodeGen/AArch64/ldst-paired-aliasing.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/ldst-paired-aliasing.ll?rev=354676&r1=354675&r2=354676&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/AArch64/ldst-paired-aliasing.ll (original)
>> +++ llvm/trunk/test/CodeGen/AArch64/ldst-paired-aliasing.ll Fri Feb 22 08:00:19 2019
>> @@ -11,8 +11,8 @@ define i32 @main() local_unnamed_addr #1
>> ; Make sure the stores happen in the correct order (the exact instructions could change).
>> ; CHECK-LABEL: main:
>>
>> -; CHECK: str xzr, [sp, #80]
>> -; CHECK: str w9, [sp, #80]
>> +; CHECK: orr w9, wzr, #0x1
>> +; CHECK: str x9, [sp, #80]
>> ; CHECK: stp q0, q0, [sp, #48]
>> ; CHECK: ldr w8, [sp, #48]
>>
>>
>> Modified: llvm/trunk/test/CodeGen/PowerPC/constant-combines.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/constant-combines.ll?rev=354676&r1=354675&r2=354676&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/PowerPC/constant-combines.ll (original)
>> +++ llvm/trunk/test/CodeGen/PowerPC/constant-combines.ll Fri Feb 22 08:00:19 2019
>> @@ -5,18 +5,15 @@
>> define void @fold_constant_stores_loaddr(i8* %i8_ptr) {
>> ; BE-LABEL: fold_constant_stores_loaddr:
>> ; BE: # %bb.0: # %entry
>> -; BE-NEXT: li 4, 0
>> +; BE-NEXT: li 4, 85
>> +; BE-NEXT: sldi 4, 4, 57
>> ; BE-NEXT: std 4, 0(3)
>> -; BE-NEXT: li 4, -86
>> -; BE-NEXT: stb 4, 0(3)
>> ; BE-NEXT: blr
>> ;
>> ; LE-LABEL: fold_constant_stores_loaddr:
>> ; LE: # %bb.0: # %entry
>> -; LE-NEXT: li 4, 0
>> -; LE-NEXT: li 5, -86
>> +; LE-NEXT: li 4, 170
>> ; LE-NEXT: std 4, 0(3)
>> -; LE-NEXT: stb 5, 0(3)
>> ; LE-NEXT: blr
>> entry:
>> %i64_ptr = bitcast i8* %i8_ptr to i64*
>> @@ -29,18 +26,15 @@ entry:
>> define void @fold_constant_stores_hiaddr(i8* %i8_ptr) {
>> ; BE-LABEL: fold_constant_stores_hiaddr:
>> ; BE: # %bb.0: # %entry
>> -; BE-NEXT: li 4, 0
>> +; BE-NEXT: li 4, 85
>> +; BE-NEXT: sldi 4, 4, 57
>> ; BE-NEXT: std 4, 0(3)
>> -; BE-NEXT: li 4, -86
>> -; BE-NEXT: stb 4, 0(3)
>> ; BE-NEXT: blr
>> ;
>> ; LE-LABEL: fold_constant_stores_hiaddr:
>> ; LE: # %bb.0: # %entry
>> -; LE-NEXT: li 4, 0
>> -; LE-NEXT: li 5, -86
>> +; LE-NEXT: li 4, 170
>> ; LE-NEXT: std 4, 0(3)
>> -; LE-NEXT: stb 5, 0(3)
>> ; LE-NEXT: blr
>> entry:
>> %i64_ptr = bitcast i8* %i8_ptr to i64*
>>
>> Modified: llvm/trunk/test/CodeGen/X86/stores-merging.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stores-merging.ll?rev=354676&r1=354675&r2=354676&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/X86/stores-merging.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/stores-merging.ll Fri Feb 22 08:00:19 2019
>> @@ -26,9 +26,8 @@ define void @redundant_stores_merging()
>> define void @redundant_stores_merging_reverse() {
>> ; CHECK-LABEL: redundant_stores_merging_reverse:
>> ; CHECK: # %bb.0:
>> -; CHECK-NEXT: movabsq $528280977409, %rax # imm = 0x7B00000001
>> +; CHECK-NEXT: movabsq $1958505086977, %rax # imm = 0x1C800000001
>> ; CHECK-NEXT: movq %rax, e+{{.*}}(%rip)
>> -; CHECK-NEXT: movl $456, e+{{.*}}(%rip) # imm = 0x1C8
>> ; CHECK-NEXT: retq
>> store i32 123, i32* getelementptr inbounds (%structTy, %structTy* @e, i64 0, i32 2), align 4
>> store i32 456, i32* getelementptr inbounds (%structTy, %structTy* @e, i64 0, i32 2), align 4
>>
>>
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