[PATCH] D58561: [AArch64] Generate FP16 vector compare instructions

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer accepted this revision.
SjoerdMeijer added a comment.
This revision is now accepted and ready to land.

LGTM, with one nit inline.



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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:7793
 
-  assert(LHS.getValueType().getVectorElementType() == MVT::f32 ||
-         LHS.getValueType().getVectorElementType() == MVT::f64);
+  if (FullFP16)
+    assert(LHS.getValueType().getVectorElementType() == MVT::f16 ||
----------------
Just looking at this if we can simplify this if-else and asserts. Folding the FullFP16 into the assert is probably not going to make things much clearer. I guess this is covering it:

  assert(( !FullFP16 && LHS.getValueType().getVectorElementType() != MVT::f16)  || 
               LHS.getValueType().getVectorElementType() != MVT::f128);


Repository:
  rL LLVM

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