[llvm] r354748 - [InstCombine] canonicalize add/sub with bool
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Sun Feb 24 08:57:45 PST 2019
Author: spatel
Date: Sun Feb 24 08:57:45 2019
New Revision: 354748
URL: http://llvm.org/viewvc/llvm-project?rev=354748&view=rev
Log:
[InstCombine] canonicalize add/sub with bool
add A, sext(B) --> sub A, zext(B)
We have to choose 1 of these forms, so I'm opting for the
zext because that's easier for value tracking.
The backend should be prepared for this change after:
D57401
rL353433
This is also a preliminary step towards reducing the amount
of bit hackery that we do in IR to optimize icmp/select.
That should be waiting to happen at a later optimization stage.
The seeming regression in the fuzzer test was discussed in:
D58359
We were only managing that fold in instcombine by luck, and
other passes should be able to deal with that better anyway.
Modified:
llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp
llvm/trunk/test/Transforms/InstCombine/add.ll
llvm/trunk/test/Transforms/InstCombine/apint-shift.ll
llvm/trunk/test/Transforms/InstCombine/logical-select.ll
llvm/trunk/test/Transforms/InstCombine/select.ll
llvm/trunk/test/Transforms/InstCombine/zext-bool-add-sub.ll
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp?rev=354748&r1=354747&r2=354748&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp Sun Feb 24 08:57:45 2019
@@ -1118,6 +1118,12 @@ Instruction *InstCombiner::visitAdd(Bina
return BinaryOperator::CreateSub(RHS, A);
}
+ // Canonicalize sext to zext for better value tracking potential.
+ // add A, sext(B) --> sub A, zext(B)
+ if (match(&I, m_c_Add(m_Value(A), m_OneUse(m_SExt(m_Value(B))))) &&
+ B->getType()->isIntOrIntVectorTy(1))
+ return BinaryOperator::CreateSub(A, Builder.CreateZExt(B, Ty));
+
// A + -B --> A - B
if (match(RHS, m_Neg(m_Value(B))))
return BinaryOperator::CreateSub(LHS, B);
Modified: llvm/trunk/test/Transforms/InstCombine/add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/add.ll?rev=354748&r1=354747&r2=354748&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/add.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/add.ll Sun Feb 24 08:57:45 2019
@@ -25,8 +25,7 @@ define <2 x i32> @select_0_or_1_from_boo
define i32 @select_C_minus_1_or_C_from_bool(i1 %x) {
; CHECK-LABEL: @select_C_minus_1_or_C_from_bool(
-; CHECK-NEXT: [[EXT:%.*]] = sext i1 [[X:%.*]] to i32
-; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[EXT]], 42
+; CHECK-NEXT: [[ADD:%.*]] = select i1 [[X:%.*]], i32 41, i32 42
; CHECK-NEXT: ret i32 [[ADD]]
;
%ext = sext i1 %x to i32
@@ -36,8 +35,7 @@ define i32 @select_C_minus_1_or_C_from_b
define <2 x i32> @select_C_minus_1_or_C_from_bool_vec(<2 x i1> %x) {
; CHECK-LABEL: @select_C_minus_1_or_C_from_bool_vec(
-; CHECK-NEXT: [[EXT:%.*]] = sext <2 x i1> [[X:%.*]] to <2 x i32>
-; CHECK-NEXT: [[ADD:%.*]] = add nsw <2 x i32> [[EXT]], <i32 42, i32 43>
+; CHECK-NEXT: [[ADD:%.*]] = select <2 x i1> [[X:%.*]], <2 x i32> <i32 41, i32 42>, <2 x i32> <i32 42, i32 43>
; CHECK-NEXT: ret <2 x i32> [[ADD]]
;
%ext = sext <2 x i1> %x to <2 x i32>
Modified: llvm/trunk/test/Transforms/InstCombine/apint-shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/apint-shift.ll?rev=354748&r1=354747&r2=354748&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/apint-shift.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/apint-shift.ll Sun Feb 24 08:57:45 2019
@@ -531,7 +531,11 @@ define i40 @test26(i40 %A) {
; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=9880
define i177 @ossfuzz_9880(i177 %X) {
; CHECK-LABEL: @ossfuzz_9880(
-; CHECK-NEXT: ret i177 1
+; CHECK-NEXT: [[A:%.*]] = alloca i177, align 8
+; CHECK-NEXT: [[L1:%.*]] = load i177, i177* [[A]], align 8
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i177 [[L1]], 0
+; CHECK-NEXT: [[B1:%.*]] = zext i1 [[TMP1]] to i177
+; CHECK-NEXT: ret i177 [[B1]]
;
%A = alloca i177
%L1 = load i177, i177* %A
Modified: llvm/trunk/test/Transforms/InstCombine/logical-select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/logical-select.ll?rev=354748&r1=354747&r2=354748&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/logical-select.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/logical-select.ll Sun Feb 24 08:57:45 2019
@@ -515,10 +515,10 @@ define <4 x i32> @vec_sel_xor(<4 x i32>
define <4 x i32> @vec_sel_xor_multi_use(<4 x i32> %a, <4 x i32> %b, <4 x i1> %c) {
; CHECK-LABEL: @vec_sel_xor_multi_use(
; CHECK-NEXT: [[TMP1:%.*]] = xor <4 x i1> [[C:%.*]], <i1 true, i1 false, i1 false, i1 false>
-; CHECK-NEXT: [[MASK_FLIP1:%.*]] = sext <4 x i1> [[TMP1]] to <4 x i32>
; CHECK-NEXT: [[TMP2:%.*]] = xor <4 x i1> [[C]], <i1 false, i1 true, i1 true, i1 true>
; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[TMP2]], <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]
-; CHECK-NEXT: [[ADD:%.*]] = add <4 x i32> [[TMP3]], [[MASK_FLIP1]]
+; CHECK-NEXT: [[TMP4:%.*]] = zext <4 x i1> [[TMP1]] to <4 x i32>
+; CHECK-NEXT: [[ADD:%.*]] = sub <4 x i32> [[TMP3]], [[TMP4]]
; CHECK-NEXT: ret <4 x i32> [[ADD]]
;
%mask = sext <4 x i1> %c to <4 x i32>
Modified: llvm/trunk/test/Transforms/InstCombine/select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/select.ll?rev=354748&r1=354747&r2=354748&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/select.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/select.ll Sun Feb 24 08:57:45 2019
@@ -694,8 +694,8 @@ define i32 @test41(i1 %cond, i32 %x, i32
define i32 @test42(i32 %x, i32 %y) {
; CHECK-LABEL: @test42(
; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[X:%.*]], 0
-; CHECK-NEXT: [[B:%.*]] = sext i1 [[COND]] to i32
-; CHECK-NEXT: [[C:%.*]] = add i32 [[B]], [[Y:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[COND]] to i32
+; CHECK-NEXT: [[C:%.*]] = sub i32 [[Y:%.*]], [[TMP1]]
; CHECK-NEXT: ret i32 [[C]]
;
%b = add i32 %y, -1
@@ -707,8 +707,8 @@ define i32 @test42(i32 %x, i32 %y) {
define <2 x i32> @test42vec(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @test42vec(
; CHECK-NEXT: [[COND:%.*]] = icmp eq <2 x i32> [[X:%.*]], zeroinitializer
-; CHECK-NEXT: [[B:%.*]] = sext <2 x i1> [[COND]] to <2 x i32>
-; CHECK-NEXT: [[C:%.*]] = add <2 x i32> [[B]], [[Y:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = zext <2 x i1> [[COND]] to <2 x i32>
+; CHECK-NEXT: [[C:%.*]] = sub <2 x i32> [[Y:%.*]], [[TMP1]]
; CHECK-NEXT: ret <2 x i32> [[C]]
;
%b = add <2 x i32> %y, <i32 -1, i32 -1>
Modified: llvm/trunk/test/Transforms/InstCombine/zext-bool-add-sub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/zext-bool-add-sub.ll?rev=354748&r1=354747&r2=354748&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/zext-bool-add-sub.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/zext-bool-add-sub.ll Sun Feb 24 08:57:45 2019
@@ -5,9 +5,9 @@
define i32 @a(i1 zeroext %x, i1 zeroext %y) {
; CHECK-LABEL: @a(
-; CHECK-NEXT: [[CONV3_NEG:%.*]] = sext i1 [[Y:%.*]] to i32
; CHECK-NEXT: [[SUB:%.*]] = select i1 [[X:%.*]], i32 2, i32 1
-; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], [[CONV3_NEG]]
+; CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[Y:%.*]] to i32
+; CHECK-NEXT: [[ADD:%.*]] = sub nsw i32 [[SUB]], [[TMP1]]
; CHECK-NEXT: ret i32 [[ADD]]
;
%conv = zext i1 %x to i32
@@ -317,8 +317,8 @@ define i8 @sext_sub_nuw(i8 %x, i1 %y) {
define i32 @sextbool_add(i1 %c, i32 %x) {
; CHECK-LABEL: @sextbool_add(
-; CHECK-NEXT: [[B:%.*]] = sext i1 [[C:%.*]] to i32
-; CHECK-NEXT: [[S:%.*]] = add i32 [[B]], [[X:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[C:%.*]] to i32
+; CHECK-NEXT: [[S:%.*]] = sub i32 [[X:%.*]], [[TMP1]]
; CHECK-NEXT: ret i32 [[S]]
;
%b = sext i1 %c to i32
@@ -329,8 +329,8 @@ define i32 @sextbool_add(i1 %c, i32 %x)
define i32 @sextbool_add_commute(i1 %c, i32 %px) {
; CHECK-LABEL: @sextbool_add_commute(
; CHECK-NEXT: [[X:%.*]] = urem i32 [[PX:%.*]], 42
-; CHECK-NEXT: [[B:%.*]] = sext i1 [[C:%.*]] to i32
-; CHECK-NEXT: [[S:%.*]] = add nsw i32 [[X]], [[B]]
+; CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[C:%.*]] to i32
+; CHECK-NEXT: [[S:%.*]] = sub nsw i32 [[X]], [[TMP1]]
; CHECK-NEXT: ret i32 [[S]]
;
%x = urem i32 %px, 42 ; thwart complexity-based canonicalization
@@ -358,8 +358,8 @@ define i32 @sextbool_add_uses(i1 %c, i32
define <4 x i32> @sextbool_add_vector(<4 x i1> %c, <4 x i32> %x) {
; CHECK-LABEL: @sextbool_add_vector(
-; CHECK-NEXT: [[B:%.*]] = sext <4 x i1> [[C:%.*]] to <4 x i32>
-; CHECK-NEXT: [[S:%.*]] = add <4 x i32> [[B]], [[X:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = zext <4 x i1> [[C:%.*]] to <4 x i32>
+; CHECK-NEXT: [[S:%.*]] = sub <4 x i32> [[X:%.*]], [[TMP1]]
; CHECK-NEXT: ret <4 x i32> [[S]]
;
%b = sext <4 x i1> %c to <4 x i32>
More information about the llvm-commits
mailing list