[PATCH] D58469: [GlobalISel][AArch64] Add selection support for G_EXTRACT_VECTOR_ELT with FPR dest
Amara Emerson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 21 11:11:58 PST 2019
aemerson added a comment.
Apart from the aforementioned refactorings which can be done later, using MachineIRBuilder would also simplify some the code.
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Comment at: lib/Target/AArch64/AArch64InstructionSelector.cpp:1876
+ // def and a subregister insert to get us there.
+ if (WideTy.getSizeInBits() != 128) {
+ unsigned ImpDefReg = MRI.createVirtualRegister(&AArch64::FPR128RegClass);
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Might need to check here for WideTy == 64 bits. Off the top of my head I'm not sure if we can have extracts from smaller vectors like <4 x s8>. If so, adding support for that would also mean we need to check the insert_subreg uses the right subreg index.
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https://reviews.llvm.org/D58469/new/
https://reviews.llvm.org/D58469
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