[llvm] r354565 - [AArch64] Print instruction before atomic semantic annotations

David Spickett via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 21 02:42:49 PST 2019


Author: davidspickett
Date: Thu Feb 21 02:42:49 2019
New Revision: 354565

URL: http://llvm.org/viewvc/llvm-project?rev=354565&view=rev
Log:
[AArch64] Print instruction before atomic semantic annotations

Commit r353303 added annotations when acquire semantics
were dropped from an instruction.

printAnnotation was called before printInstruction.
So if you didn't set a separate comment output stream
you got <comment><instr> instead of <instr><comment>
as expected.

To fix this move the new printAnnotation to after
the instruction is printed.

Differential Revision: https://reviews.llvm.org/D58059

Modified:
    llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp

Modified: llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp?rev=354565&r1=354564&r2=354565&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp Thu Feb 21 02:42:49 2019
@@ -69,11 +69,6 @@ void AArch64InstPrinter::printInst(const
       return;
     }
 
-  if (atomicBarrierDroppedOnZero(Opcode) &&
-      (MI->getOperand(0).getReg() == AArch64::XZR ||
-       MI->getOperand(0).getReg() == AArch64::WZR))
-    printAnnotation(O, "acquire semantics dropped since destination is zero");
-
   // SBFM/UBFM should print to a nicer aliased form if possible.
   if (Opcode == AArch64::SBFMXri || Opcode == AArch64::SBFMWri ||
       Opcode == AArch64::UBFMXri || Opcode == AArch64::UBFMWri) {
@@ -297,6 +292,12 @@ void AArch64InstPrinter::printInst(const
     printInstruction(MI, STI, O);
 
   printAnnotation(O, Annot);
+
+  if (atomicBarrierDroppedOnZero(Opcode) &&
+      (MI->getOperand(0).getReg() == AArch64::XZR ||
+       MI->getOperand(0).getReg() == AArch64::WZR)) {
+    printAnnotation(O, "acquire semantics dropped since destination is zero");
+  }
 }
 
 static bool isTblTbxInstruction(unsigned Opcode, StringRef &Layout,




More information about the llvm-commits mailing list