[llvm] r354518 - [DAGCombine] Generalize Dead Store to overlapping stores.

Nirav Dave via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 20 13:07:50 PST 2019


Author: niravd
Date: Wed Feb 20 13:07:50 2019
New Revision: 354518

URL: http://llvm.org/viewvc/llvm-project?rev=354518&view=rev
Log:
[DAGCombine] Generalize Dead Store to overlapping stores.

Summary:
Remove stores that are immediately overwritten by larger
stores.

Reviewers: courbet, rnk

Reviewed By: rnk

Subscribers: javed.absar, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58467

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/AArch64/ldst-paired-aliasing.ll
    llvm/trunk/test/CodeGen/X86/pr40631_deadstore_elision.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=354518&r1=354517&r2=354518&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed Feb 20 13:07:50 2019
@@ -15414,25 +15414,28 @@ SDValue DAGCombiner::visitSTORE(SDNode *
 
   if (StoreSDNode *ST1 = dyn_cast<StoreSDNode>(Chain)) {
     if (ST->isUnindexed() && !ST->isVolatile() && ST1->isUnindexed() &&
-        !ST1->isVolatile() && ST1->getBasePtr() == Ptr &&
-        ST->getMemoryVT() == ST1->getMemoryVT()) {
-      // If this is a store followed by a store with the same value to the same
-      // location, then the store is dead/noop.
-      if (ST1->getValue() == Value) {
-        // The store is dead, remove it.
+        !ST1->isVolatile()) {
+      if (ST1->getBasePtr() == Ptr && ST1->getValue() == Value &&
+          ST->getMemoryVT() == ST1->getMemoryVT()) {
+        // If this is a store followed by a store with the same value to the
+        // same location, then the store is dead/noop.
         return Chain;
       }
 
-      // If this is a store who's preceeding store to the same location
-      // and no one other node is chained to that store we can effectively
-      // drop the store. Do not remove stores to undef as they may be used as
-      // data sinks.
       if (OptLevel != CodeGenOpt::None && ST1->hasOneUse() &&
           !ST1->getBasePtr().isUndef()) {
-        // ST1 is fully overwritten and can be elided. Combine with it's chain
-        // value.
-        CombineTo(ST1, ST1->getChain());
-        return SDValue();
+        const BaseIndexOffset STBase = BaseIndexOffset::match(ST, DAG);
+        const BaseIndexOffset ChainBase = BaseIndexOffset::match(ST1, DAG);
+        unsigned STByteSize = ST->getMemoryVT().getSizeInBits() / 8;
+        unsigned ChainByteSize = ST1->getMemoryVT().getSizeInBits() / 8;
+        // If this is a store who's preceeding store to a subset of the current
+        // location and no one other node is chained to that store we can
+        // effectively drop the store. Do not remove stores to undef as they may
+        // be used as data sinks.
+        if (STBase.contains(STByteSize, ChainBase, ChainByteSize, DAG)) {
+          CombineTo(ST1, ST1->getChain());
+          return SDValue();
+        }
       }
     }
   }

Modified: llvm/trunk/test/CodeGen/AArch64/ldst-paired-aliasing.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/ldst-paired-aliasing.ll?rev=354518&r1=354517&r2=354518&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/ldst-paired-aliasing.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/ldst-paired-aliasing.ll Wed Feb 20 13:07:50 2019
@@ -10,11 +10,11 @@ declare void @llvm.memset.p0i8.i64(i8* n
 define i32 @main() local_unnamed_addr #1 {
 ; Make sure the stores happen in the correct order (the exact instructions could change).
 ; CHECK-LABEL: main:
-; CHECK: stp xzr, xzr, [sp, #72]
+
+; CHECK: str xzr, [sp, #80]
 ; CHECK: str w9, [sp, #80]
-; CHECK: str q0, [sp, #48]
+; CHECK: stp q0, q0, [sp, #48]
 ; CHECK: ldr w8, [sp, #48]
-; CHECK: str q0, [sp, #64]
 
 for.body.lr.ph.i.i.i.i.i.i63:
   %b1 = alloca [10 x i32], align 16

Modified: llvm/trunk/test/CodeGen/X86/pr40631_deadstore_elision.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr40631_deadstore_elision.ll?rev=354518&r1=354517&r2=354518&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr40631_deadstore_elision.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr40631_deadstore_elision.ll Wed Feb 20 13:07:50 2019
@@ -11,7 +11,6 @@ define i32 @ipt_do_table(%struct.sk_buff
 ; CHECK-NEXT:    .cfi_def_cfa_offset 48
 ; CHECK-NEXT:    movq (%rdi), %rax
 ; CHECK-NEXT:    xorps %xmm0, %xmm0
-; CHECK-NEXT:    movaps %xmm0, (%rsp)
 ; CHECK-NEXT:    movaps %xmm0, {{[0-9]+}}(%rsp)
 ; CHECK-NEXT:    movq $0, {{[0-9]+}}(%rsp)
 ; CHECK-NEXT:    movaps {{.*#+}} xmm0 = [12297829382473034410,12297829382473034410]




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