[llvm] r354475 - [CGP][x86] add tests for usubo special-case; NFC

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Wed Feb 20 07:40:58 2019
New Revision: 354475

URL: http://llvm.org/viewvc/llvm-project?rev=354475&view=rev
Log:
[CGP][x86] add tests for usubo special-case; NFC

This is another example from PR31754:
https://bugs.llvm.org/show_bug.cgi?id=31754

Modified:
    llvm/trunk/test/CodeGen/X86/cgp-usubo.ll
    llvm/trunk/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll

Modified: llvm/trunk/test/CodeGen/X86/cgp-usubo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cgp-usubo.ll?rev=354475&r1=354474&r2=354475&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cgp-usubo.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cgp-usubo.ll Wed Feb 20 07:40:58 2019
@@ -106,6 +106,23 @@ define i1 @usubo_eq_constant1_op1_i32(i3
   ret i1 %ov
 }
 
+; Special-case: subtract from 0 (negate) changes the compare predicate.
+
+define i1 @usubo_ne_constant0_op1_i32(i32 %x, i32* %p) {
+; CHECK-LABEL: usubo_ne_constant0_op1_i32:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %edi, %ecx
+; CHECK-NEXT:    negl %ecx
+; CHECK-NEXT:    testl %edi, %edi
+; CHECK-NEXT:    setne %al
+; CHECK-NEXT:    movl %ecx, (%rsi)
+; CHECK-NEXT:    retq
+  %s = sub i32 0, %x
+  %ov = icmp ne i32 %x, 0
+  store i32 %s, i32* %p
+  ret i1 %ov
+}
+
 ; Verify insertion point for multi-BB.
 
 declare void @call(i1)
@@ -114,16 +131,16 @@ define i1 @usubo_ult_sub_dominates_i64(i
 ; CHECK-LABEL: usubo_ult_sub_dominates_i64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    testb $1, %cl
-; CHECK-NEXT:    je .LBB7_2
+; CHECK-NEXT:    je .LBB8_2
 ; CHECK-NEXT:  # %bb.1: # %t
 ; CHECK-NEXT:    subq %rsi, %rdi
 ; CHECK-NEXT:    setb %al
 ; CHECK-NEXT:    movq %rdi, (%rdx)
 ; CHECK-NEXT:    testb $1, %cl
-; CHECK-NEXT:    jne .LBB7_3
-; CHECK-NEXT:  .LBB7_2: # %f
+; CHECK-NEXT:    jne .LBB8_3
+; CHECK-NEXT:  .LBB8_2: # %f
 ; CHECK-NEXT:    movl %ecx, %eax
-; CHECK-NEXT:  .LBB7_3: # %end
+; CHECK-NEXT:  .LBB8_3: # %end
 ; CHECK-NEXT:    retq
 entry:
   br i1 %cond, label %t, label %f
@@ -151,7 +168,7 @@ define i1 @usubo_ult_cmp_dominates_i64(i
 ; CHECK-NEXT:    pushq %rax
 ; CHECK-NEXT:    movl %ecx, %ebp
 ; CHECK-NEXT:    testb $1, %bpl
-; CHECK-NEXT:    je .LBB8_2
+; CHECK-NEXT:    je .LBB9_2
 ; CHECK-NEXT:  # %bb.1: # %t
 ; CHECK-NEXT:    movq %rdx, %r14
 ; CHECK-NEXT:    movq %rsi, %r15
@@ -161,14 +178,14 @@ define i1 @usubo_ult_cmp_dominates_i64(i
 ; CHECK-NEXT:    setb %dil
 ; CHECK-NEXT:    callq call
 ; CHECK-NEXT:    subq %r15, %rbx
-; CHECK-NEXT:    jae .LBB8_2
+; CHECK-NEXT:    jae .LBB9_2
 ; CHECK-NEXT:  # %bb.4: # %end
 ; CHECK-NEXT:    setb %al
 ; CHECK-NEXT:    movq %rbx, (%r14)
-; CHECK-NEXT:    jmp .LBB8_3
-; CHECK-NEXT:  .LBB8_2: # %f
+; CHECK-NEXT:    jmp .LBB9_3
+; CHECK-NEXT:  .LBB9_2: # %f
 ; CHECK-NEXT:    movl %ebp, %eax
-; CHECK-NEXT:  .LBB8_3: # %f
+; CHECK-NEXT:  .LBB9_3: # %f
 ; CHECK-NEXT:    addq $8, %rsp
 ; CHECK-NEXT:    popq %rbx
 ; CHECK-NEXT:    popq %r14

Modified: llvm/trunk/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll?rev=354475&r1=354474&r2=354475&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll (original)
+++ llvm/trunk/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll Wed Feb 20 07:40:58 2019
@@ -281,6 +281,21 @@ define i1 @usubo_eq_constant1_op1_i32(i3
   ret i1 %ov
 }
 
+; Special-case: subtract from 0 (negate) changes the compare predicate.
+
+define i1 @usubo_ne_constant0_op1_i32(i32 %x, i32* %p) {
+; CHECK-LABEL: @usubo_ne_constant0_op1_i32(
+; CHECK-NEXT:    [[S:%.*]] = sub i32 0, [[X:%.*]]
+; CHECK-NEXT:    [[OV:%.*]] = icmp ne i32 [[X]], 0
+; CHECK-NEXT:    store i32 [[S]], i32* [[P:%.*]]
+; CHECK-NEXT:    ret i1 [[OV]]
+;
+  %s = sub i32 0, %x
+  %ov = icmp ne i32 %x, 0
+  store i32 %s, i32* %p
+  ret i1 %ov
+}
+
 ; Verify insertion point for multi-BB.
 
 declare void @call(i1)