[PATCH] D56703: PowerPC: Fix register spilling for SPE registers

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai requested changes to this revision.
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I think this is very close, but I really think the reloading code needs to be fixed.



================
Comment at: lib/Target/PowerPC/PPCInstrInfo.cpp:1161
       OpcodeIndex = SOK_Float4Spill;
+    } else if (PPC::SPE4RCRegClass.hasSubClassEq(RC)) {
+      OpcodeIndex = SOK_SPE4Spill;
----------------
This does not look right. We are in `RC == nullptr` section here. Why are we checking `hasSubClassEq(nullptr)`?


================
Comment at: lib/Target/PowerPC/PPCRegisterInfo.cpp:163
   if (MF->getFunction().getCallingConv() == CallingConv::Cold) {
     return TM.isPPC64()
                ? (Subtarget.hasAltivec()
----------------
These ternary operator expressions were arguably too complex already. I don't think there's any doubt that after this they're becoming nearly unparsable by a human. Can you please refactor these to use nested if's?


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https://reviews.llvm.org/D56703