[PATCH] D58428: [PowerPC] fix killed/dead flag after reg+reg to reg+imm transformation
ChenZheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 19 23:31:02 PST 2019
shchenz created this revision.
shchenz added reviewers: nemanjai, steven.zhang, jsji, hfinkel, stefanp.
Herald added a subscriber: hiraditya.
Herald added a project: LLVM.
---
name: testKilled
tracksRegLiveness: true
body: |
bb.0.entry:
liveins: $x3, $f1, $x5
$x3 = ADDI8 $x5, 100
STD killed $x5, $x5, 100
STFSX killed $f1, $zero8, killed $x3
BLR8 implicit $lr8, implicit $rm
`llc -mtriple=powerpc64le--linux-gnu -stop-after ppc-pre-emit-peephole t.mir -o - -verify-machineinstrs`
# After PowerPC Pre-Emit Peephole
# Machine code for function testKill: NoPHIs, TracksLiveness, NoVRegs
bb.0.entry:
liveins: $f1, $x3, $x5
STD killed $x5, $x5, 100
STFS killed $f1, 100, $x5
BLR8 implicit $lr8, implicit $rm
# End machine code for function testKill.
*** Bad machine code: Using an undefined physical register ***
- function: testKill
- basic block: %bb.0 entry (0x100313d8218)
- instruction: STFS killed $f1, 100, $x5
- operand 2: $x5
LLVM ERROR: Found 1 machine code errors.
PowerPC Peephole will convert `ADDI8` + `STFSX` to `STFS`. But currently it does not consider about killed/dead flag, so after transformation in the above case $x5 is used after killed.
https://reviews.llvm.org/D58428
Files:
llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/lib/Target/PowerPC/PPCInstrInfo.h
llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instr-add.mir
llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs-kill-flag.mir
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