[llvm] r354419 - [WebAssembly] Fix load/store name detection for atomic instructions
Heejin Ahn via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 19 17:14:37 PST 2019
Author: aheejin
Date: Tue Feb 19 17:14:36 2019
New Revision: 354419
URL: http://llvm.org/viewvc/llvm-project?rev=354419&view=rev
Log:
[WebAssembly] Fix load/store name detection for atomic instructions
Summary:
Fixed a bug in the routine in AsmParser that determines whether the
current instruction is a load or a store. Atomic instructions' prefixes
are not `atomic_` but `atomic.`, and all atomic instructions are also
memory instructions. Also fixed the printing format of atomic
instructions to match other memory instructions and added encoding tests
for atomic instructions.
Reviewers: aardappel, tlively
Subscribers: dschuff, sbc100, jgravelle-google, sunfish, jfb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D58337
Added:
llvm/trunk/test/MC/WebAssembly/atomics-encodings.s
Modified:
llvm/trunk/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrAtomics.td
Modified: llvm/trunk/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp?rev=354419&r1=354418&r2=354419&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp Tue Feb 19 17:14:36 2019
@@ -348,8 +348,7 @@ public:
// FIXME: there is probably a cleaner way to do this.
auto IsLoadStore = InstName.startswith("load") ||
InstName.startswith("store") ||
- InstName.startswith("atomic_load") ||
- InstName.startswith("atomic_store");
+ InstName.startswith("atomic");
if (IsLoadStore) {
// Parse load/store operands of the form: offset align
auto &Offset = Lexer.getTok();
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrAtomics.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrAtomics.td?rev=354419&r1=354418&r2=354419&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrAtomics.td (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrAtomics.td Tue Feb 19 17:14:36 2019
@@ -337,7 +337,7 @@ multiclass WebAssemblyBinRMW<WebAssembly
(ins P2Align:$p2align, offset32_op:$off, I32:$addr, rc:$val),
(outs), (ins P2Align:$p2align, offset32_op:$off), [],
!strconcat(Name, "\t$dst, ${off}(${addr})${p2align}, $val"),
- !strconcat(Name, "\t${off}, ${p2align}"), Opcode>;
+ !strconcat(Name, "\t${off}${p2align}"), Opcode>;
}
defm ATOMIC_RMW_ADD_I32 : WebAssemblyBinRMW<I32, "i32.atomic.rmw.add", 0xfe1e>;
@@ -668,7 +668,7 @@ multiclass WebAssemblyTerRMW<WebAssembly
rc:$new),
(outs), (ins P2Align:$p2align, offset32_op:$off), [],
!strconcat(Name, "\t$dst, ${off}(${addr})${p2align}, $exp, $new"),
- !strconcat(Name, "\t${off}, ${p2align}"), Opcode>;
+ !strconcat(Name, "\t${off}${p2align}"), Opcode>;
}
defm ATOMIC_RMW_CMPXCHG_I32 :
@@ -901,20 +901,20 @@ defm ATOMIC_NOTIFY :
(ins P2Align:$p2align, offset32_op:$off, I32:$addr, I32:$count),
(outs), (ins P2Align:$p2align, offset32_op:$off), [],
"atomic.notify \t$dst, ${off}(${addr})${p2align}, $count",
- "atomic.notify \t${off}, ${p2align}", 0xfe00>;
+ "atomic.notify \t${off}${p2align}", 0xfe00>;
let mayLoad = 1 in {
defm ATOMIC_WAIT_I32 :
I<(outs I32:$dst),
(ins P2Align:$p2align, offset32_op:$off, I32:$addr, I32:$exp, I64:$timeout),
(outs), (ins P2Align:$p2align, offset32_op:$off), [],
"i32.atomic.wait \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
- "i32.atomic.wait \t${off}, ${p2align}", 0xfe01>;
+ "i32.atomic.wait \t${off}${p2align}", 0xfe01>;
defm ATOMIC_WAIT_I64 :
I<(outs I32:$dst),
(ins P2Align:$p2align, offset32_op:$off, I32:$addr, I64:$exp, I64:$timeout),
(outs), (ins P2Align:$p2align, offset32_op:$off), [],
"i64.atomic.wait \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
- "i64.atomic.wait \t${off}, ${p2align}", 0xfe02>;
+ "i64.atomic.wait \t${off}${p2align}", 0xfe02>;
} // mayLoad = 1
} // hasSideEffects = 1
Added: llvm/trunk/test/MC/WebAssembly/atomics-encodings.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/WebAssembly/atomics-encodings.s?rev=354419&view=auto
==============================================================================
--- llvm/trunk/test/MC/WebAssembly/atomics-encodings.s (added)
+++ llvm/trunk/test/MC/WebAssembly/atomics-encodings.s Tue Feb 19 17:14:36 2019
@@ -0,0 +1,149 @@
+# RUN: llvm-mc -show-encoding -triple=wasm32-unkown-unknown -mattr=+atomics < %s | FileCheck %s
+
+main:
+ .functype main () -> ()
+
+ # FIXME This doesn't work because of PR40728. Enable this once it's fixed.
+ # C HECK: atomic.notify 0:p2align=0 # encoding: [0xfe,0x00,0x00,0x00]
+ # atomic.notify 0
+ # CHECK: i32.atomic.wait 0:p2align=0 # encoding: [0xfe,0x01,0x00,0x00]
+ i32.atomic.wait 0
+ # CHECK: i64.atomic.wait 0:p2align=0 # encoding: [0xfe,0x02,0x00,0x00]
+ i64.atomic.wait 0
+
+ # CHECK: i32.atomic.load 0:p2align=0 # encoding: [0xfe,0x10,0x00,0x00]
+ i32.atomic.load 0
+ # CHECK: i64.atomic.load 4:p2align=0 # encoding: [0xfe,0x11,0x00,0x04]
+ i64.atomic.load 4
+ # CHECK: i32.atomic.load8_u 48 # encoding: [0xfe,0x12,0x00,0x30]
+ i32.atomic.load8_u 48
+ # CHECK: i32.atomic.load16_u 0:p2align=0 # encoding: [0xfe,0x13,0x00,0x00]
+ i32.atomic.load16_u 0
+ # CHECK: i64.atomic.load8_u 0 # encoding: [0xfe,0x14,0x00,0x00]
+ i64.atomic.load8_u 0
+ # CHECK: i64.atomic.load16_u 0:p2align=0 # encoding: [0xfe,0x15,0x00,0x00]
+ i64.atomic.load16_u 0
+ # CHECK: i64.atomic.load32_u 0:p2align=0 # encoding: [0xfe,0x16,0x00,0x00]
+ i64.atomic.load32_u 0
+
+ # CHECK: i32.atomic.store 0:p2align=0 # encoding: [0xfe,0x17,0x00,0x00]
+ i32.atomic.store 0
+ # CHECK: i64.atomic.store 8:p2align=0 # encoding: [0xfe,0x18,0x00,0x08]
+ i64.atomic.store 8
+ # CHECK: i32.atomic.store8 0 # encoding: [0xfe,0x19,0x00,0x00]
+ i32.atomic.store8 0
+ # CHECK: i32.atomic.store16 0:p2align=0 # encoding: [0xfe,0x1a,0x00,0x00]
+ i32.atomic.store16 0
+ # CHECK: i64.atomic.store8 16 # encoding: [0xfe,0x1b,0x00,0x10]
+ i64.atomic.store8 16
+ # CHECK: i64.atomic.store16 0:p2align=0 # encoding: [0xfe,0x1c,0x00,0x00]
+ i64.atomic.store16 0
+ # CHECK: i64.atomic.store32 0:p2align=0 # encoding: [0xfe,0x1d,0x00,0x00]
+ i64.atomic.store32 0
+
+ # CHECK: i32.atomic.rmw.add 0:p2align=0 # encoding: [0xfe,0x1e,0x00,0x00]
+ i32.atomic.rmw.add 0
+ # CHECK: i64.atomic.rmw.add 0:p2align=0 # encoding: [0xfe,0x1f,0x00,0x00]
+ i64.atomic.rmw.add 0
+ # CHECK: i32.atomic.rmw8.add_u 0 # encoding: [0xfe,0x20,0x00,0x00]
+ i32.atomic.rmw8.add_u 0
+ # CHECK: i32.atomic.rmw16.add_u 0:p2align=0 # encoding: [0xfe,0x21,0x00,0x00]
+ i32.atomic.rmw16.add_u 0
+ # CHECK: i64.atomic.rmw8.add_u 0 # encoding: [0xfe,0x22,0x00,0x00]
+ i64.atomic.rmw8.add_u 0
+ # CHECK: i64.atomic.rmw16.add_u 0:p2align=0 # encoding: [0xfe,0x23,0x00,0x00]
+ i64.atomic.rmw16.add_u 0
+ # CHECK: i64.atomic.rmw32.add_u 16:p2align=0 # encoding: [0xfe,0x24,0x00,0x10]
+ i64.atomic.rmw32.add_u 16
+
+ # CHECK: i32.atomic.rmw.sub 0:p2align=0 # encoding: [0xfe,0x25,0x00,0x00]
+ i32.atomic.rmw.sub 0
+ # CHECK: i64.atomic.rmw.sub 0:p2align=0 # encoding: [0xfe,0x26,0x00,0x00]
+ i64.atomic.rmw.sub 0
+ # CHECK: i32.atomic.rmw8.sub_u 0 # encoding: [0xfe,0x27,0x00,0x00]
+ i32.atomic.rmw8.sub_u 0
+ # CHECK: i32.atomic.rmw16.sub_u 0:p2align=0 # encoding: [0xfe,0x28,0x00,0x00]
+ i32.atomic.rmw16.sub_u 0
+ # CHECK: i64.atomic.rmw8.sub_u 8 # encoding: [0xfe,0x29,0x00,0x08]
+ i64.atomic.rmw8.sub_u 8
+ # CHECK: i64.atomic.rmw16.sub_u 0:p2align=0 # encoding: [0xfe,0x2a,0x00,0x00]
+ i64.atomic.rmw16.sub_u 0
+ # CHECK: i64.atomic.rmw32.sub_u 0:p2align=0 # encoding: [0xfe,0x2b,0x00,0x00]
+ i64.atomic.rmw32.sub_u 0
+
+ # CHECK: i32.atomic.rmw.and 0:p2align=0 # encoding: [0xfe,0x2c,0x00,0x00]
+ i32.atomic.rmw.and 0
+ # CHECK: i64.atomic.rmw.and 0:p2align=0 # encoding: [0xfe,0x2d,0x00,0x00]
+ i64.atomic.rmw.and 0
+ # CHECK: i32.atomic.rmw8.and_u 0 # encoding: [0xfe,0x2e,0x00,0x00]
+ i32.atomic.rmw8.and_u 0
+ # CHECK: i32.atomic.rmw16.and_u 0:p2align=0 # encoding: [0xfe,0x2f,0x00,0x00]
+ i32.atomic.rmw16.and_u 0
+ # CHECK: i64.atomic.rmw8.and_u 96 # encoding: [0xfe,0x30,0x00,0x60]
+ i64.atomic.rmw8.and_u 96
+ # CHECK: i64.atomic.rmw16.and_u 0:p2align=0 # encoding: [0xfe,0x31,0x00,0x00]
+ i64.atomic.rmw16.and_u 0
+ # CHECK: i64.atomic.rmw32.and_u 0:p2align=0 # encoding: [0xfe,0x32,0x00,0x00]
+ i64.atomic.rmw32.and_u 0
+
+ # CHECK: i32.atomic.rmw.or 0:p2align=0 # encoding: [0xfe,0x33,0x00,0x00]
+ i32.atomic.rmw.or 0
+ # CHECK: i64.atomic.rmw.or 0:p2align=0 # encoding: [0xfe,0x34,0x00,0x00]
+ i64.atomic.rmw.or 0
+ # CHECK: i32.atomic.rmw8.or_u 0 # encoding: [0xfe,0x35,0x00,0x00]
+ i32.atomic.rmw8.or_u 0
+ # CHECK: i32.atomic.rmw16.or_u 0:p2align=0 # encoding: [0xfe,0x36,0x00,0x00]
+ i32.atomic.rmw16.or_u 0
+ # CHECK: i64.atomic.rmw8.or_u 0 # encoding: [0xfe,0x37,0x00,0x00]
+ i64.atomic.rmw8.or_u 0
+ # CHECK: i64.atomic.rmw16.or_u 48:p2align=0 # encoding: [0xfe,0x38,0x00,0x30]
+ i64.atomic.rmw16.or_u 48
+ # CHECK: i64.atomic.rmw32.or_u 0:p2align=0 # encoding: [0xfe,0x39,0x00,0x00]
+ i64.atomic.rmw32.or_u 0
+
+ # CHECK: i32.atomic.rmw.xor 0:p2align=0 # encoding: [0xfe,0x3a,0x00,0x00]
+ i32.atomic.rmw.xor 0
+ # CHECK: i64.atomic.rmw.xor 0:p2align=0 # encoding: [0xfe,0x3b,0x00,0x00]
+ i64.atomic.rmw.xor 0
+ # CHECK: i32.atomic.rmw8.xor_u 4 # encoding: [0xfe,0x3c,0x00,0x04]
+ i32.atomic.rmw8.xor_u 4
+ # CHECK: i32.atomic.rmw16.xor_u 0:p2align=0 # encoding: [0xfe,0x3d,0x00,0x00]
+ i32.atomic.rmw16.xor_u 0
+ # CHECK: i64.atomic.rmw8.xor_u 0 # encoding: [0xfe,0x3e,0x00,0x00]
+ i64.atomic.rmw8.xor_u 0
+ # CHECK: i64.atomic.rmw16.xor_u 0:p2align=0 # encoding: [0xfe,0x3f,0x00,0x00]
+ i64.atomic.rmw16.xor_u 0
+ # CHECK: i64.atomic.rmw32.xor_u 0:p2align=0 # encoding: [0xfe,0x40,0x00,0x00]
+ i64.atomic.rmw32.xor_u 0
+
+ # CHECK: i32.atomic.rmw.xchg 0:p2align=0 # encoding: [0xfe,0x41,0x00,0x00]
+ i32.atomic.rmw.xchg 0
+ # CHECK: i64.atomic.rmw.xchg 0:p2align=0 # encoding: [0xfe,0x42,0x00,0x00]
+ i64.atomic.rmw.xchg 0
+ # CHECK: i32.atomic.rmw8.xchg_u 0 # encoding: [0xfe,0x43,0x00,0x00]
+ i32.atomic.rmw8.xchg_u 0
+ # CHECK: i32.atomic.rmw16.xchg_u 0:p2align=0 # encoding: [0xfe,0x44,0x00,0x00]
+ i32.atomic.rmw16.xchg_u 0
+ # CHECK: i64.atomic.rmw8.xchg_u 0 # encoding: [0xfe,0x45,0x00,0x00]
+ i64.atomic.rmw8.xchg_u 0
+ # CHECK: i64.atomic.rmw16.xchg_u 8:p2align=0 # encoding: [0xfe,0x46,0x00,0x08]
+ i64.atomic.rmw16.xchg_u 8
+ # CHECK: i64.atomic.rmw32.xchg_u 0:p2align=0 # encoding: [0xfe,0x47,0x00,0x00]
+ i64.atomic.rmw32.xchg_u 0
+
+ # CHECK: i32.atomic.rmw.cmpxchg 32:p2align=0 # encoding: [0xfe,0x48,0x00,0x20]
+ i32.atomic.rmw.cmpxchg 32
+ # CHECK: i64.atomic.rmw.cmpxchg 0:p2align=0 # encoding: [0xfe,0x49,0x00,0x00]
+ i64.atomic.rmw.cmpxchg 0
+ # CHECK: i32.atomic.rmw8.cmpxchg_u 0 # encoding: [0xfe,0x4a,0x00,0x00]
+ i32.atomic.rmw8.cmpxchg_u 0
+ # CHECK: i32.atomic.rmw16.cmpxchg_u 0:p2align=0 # encoding: [0xfe,0x4b,0x00,0x00]
+ i32.atomic.rmw16.cmpxchg_u 0
+ # CHECK: i64.atomic.rmw8.cmpxchg_u 16 # encoding: [0xfe,0x4c,0x00,0x10]
+ i64.atomic.rmw8.cmpxchg_u 16
+ # CHECK: i64.atomic.rmw16.cmpxchg_u 0:p2align=0 # encoding: [0xfe,0x4d,0x00,0x00]
+ i64.atomic.rmw16.cmpxchg_u 0
+ # CHECK: i64.atomic.rmw32.cmpxchg_u 0:p2align=0 # encoding: [0xfe,0x4e,0x00,0x00]
+ i64.atomic.rmw32.cmpxchg_u 0
+
+ end_function
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