[llvm] r354382 - PowerPC: Fix typos in comments

[Jinsong Ji via llvm-commits]

Author: jsji
Date: Tue Feb 19 13:25:13 2019
New Revision: 354382

URL: http://llvm.org/viewvc/llvm-project?rev=354382&view=rev
Log:
PowerPC: Fix typos in comments

Modified:
    llvm/trunk/lib/Target/PowerPC/P9InstrResources.td

Modified: llvm/trunk/lib/Target/PowerPC/P9InstrResources.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/P9InstrResources.td?rev=354382&r1=354381&r2=354382&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/P9InstrResources.td (original)
+++ llvm/trunk/lib/Target/PowerPC/P9InstrResources.td Tue Feb 19 13:25:13 2019
@@ -84,7 +84,7 @@ def : InstRW<[P9_ALUE_2C, P9_ALUO_2C, IP
 )>;
 
 // Restricted Dispatch ALU operation for 3 cycles. The operation runs on a
-// slingle slice. However, since it is Restricted it requires all 3 dispatches
+// single slice. However, since it is Restricted it requires all 3 dispatches
 // (DISP) for that superslice.
 def : InstRW<[P9_ALU_3C, IP_EXEC_1C, DISP_1C, DISP_1C, DISP_1C],
       (instrs
@@ -170,7 +170,7 @@ def : InstRW<[P9_ALU_2C, IP_EXEC_1C, DIS
 )>;
 
 // Restricted Dispatch ALU operation for 2 cycles. The operation runs on a
-//  slingle slice. However, since it is Restricted it requires all 3 dispatches
+//  single slice. However, since it is Restricted it requires all 3 dispatches
 //  (DISP) for that superslice.
 def : InstRW<[P9_ALU_2C, IP_EXEC_1C, DISP_1C, DISP_1C, DISP_1C],
       (instrs