[PATCH] D58364: [PowerPC] exploit P9 new instruction maddld
Nemanja Ivanovic via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 19 10:19:32 PST 2019
nemanjai accepted this revision.
nemanjai added a comment.
This revision is now accepted and ready to land.
LGTM once the minor nits are addressed.
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Comment at: llvm/lib/Target/PowerPC/PPCInstr64Bit.td:779
+ "maddld $RT, $RA, $RB, $RC", IIC_IntMulHD,
+ [(set i32:$RT, (add (mul i32:$RA, i32:$RB), i32:$RC))]>, isPPC64;
def SETB : XForm_44<31, 128, (outs gprc:$RT), (ins crrc:$BFA),
----------------
Here and below, it looks like the lines are too long. Please keep them to 80 columns.
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Comment at: llvm/test/CodeGen/PowerPC/maddld.ll:5
+
+define signext i64 @maddld64(i64 signext %a, i64 signext %b) {
+; CHECK-P9-LABEL: maddld64:
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It would perhaps be nice to make one of these use 3 different registers (i.e. by taking 3 parameters).
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https://reviews.llvm.org/D58364/new/
https://reviews.llvm.org/D58364
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