[llvm] r354333 - [RISCV][NFC] Move some std::string to StringRef
Alex Bradbury via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 19 06:42:00 PST 2019
Author: asb
Date: Tue Feb 19 06:42:00 2019
New Revision: 354333
URL: http://llvm.org/viewvc/llvm-project?rev=354333&view=rev
Log:
[RISCV][NFC] Move some std::string to StringRef
Modified:
llvm/trunk/lib/Target/RISCV/RISCVSubtarget.cpp
llvm/trunk/lib/Target/RISCV/RISCVSubtarget.h
llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp
Modified: llvm/trunk/lib/Target/RISCV/RISCVSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVSubtarget.cpp?rev=354333&r1=354332&r2=354333&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/RISCVSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/RISCV/RISCVSubtarget.cpp Tue Feb 19 06:42:00 2019
@@ -40,8 +40,8 @@ RISCVSubtarget &RISCVSubtarget::initiali
return *this;
}
-RISCVSubtarget::RISCVSubtarget(const Triple &TT, const std::string &CPU,
- const std::string &FS, const TargetMachine &TM)
+RISCVSubtarget::RISCVSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
+ const TargetMachine &TM)
: RISCVGenSubtargetInfo(TT, CPU, FS),
FrameLowering(initializeSubtargetDependencies(CPU, FS, TT.isArch64Bit())),
InstrInfo(), RegInfo(getHwMode()), TLInfo(TM, *this) {}
Modified: llvm/trunk/lib/Target/RISCV/RISCVSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVSubtarget.h?rev=354333&r1=354332&r2=354333&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/RISCVSubtarget.h (original)
+++ llvm/trunk/lib/Target/RISCV/RISCVSubtarget.h Tue Feb 19 06:42:00 2019
@@ -51,8 +51,8 @@ class RISCVSubtarget : public RISCVGenSu
public:
// Initializes the data members to match that of the specified triple.
- RISCVSubtarget(const Triple &TT, const std::string &CPU,
- const std::string &FS, const TargetMachine &TM);
+ RISCVSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
+ const TargetMachine &TM);
// Parses features string setting specified subtarget options. The
// definition of this function is auto-generated by tblgen.
Modified: llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp?rev=354333&r1=354332&r2=354333&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp Tue Feb 19 06:42:00 2019
@@ -30,7 +30,7 @@ extern "C" void LLVMInitializeRISCVTarge
initializeRISCVExpandPseudoPass(*PR);
}
-static std::string computeDataLayout(const Triple &TT) {
+static StringRef computeDataLayout(const Triple &TT) {
if (TT.isArch64Bit()) {
return "e-m:e-p:64:64-i64:64-i128:128-n64-S128";
} else {
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