[PATCH] D57997: [SDAG] Support vector UMULO/SMULO

Mon Feb 18 12:38:01 PST 2019

nikic marked 4 inline comments as done.
nikic added inline comments.

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Comment at: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:981
-                             DAG.getIntPtrConstant(SmallVT.getSizeInBits(),
-                                                   DL));
     Overflow = DAG.getSetCC(DL, N->getValueType(1), Hi,
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RKSimon wrote:
> This needs fixing right away as a separate commit - we should be using getShiftAmountTy. I'm happy for you to use getScalarSizeInBits straight away as well.
This is a somewhat odd case: The existing code here was actually correct, and my change wasn't. The problem is that we're still during legalization and the integer sizes involved may have more bits than can fit into the shift amount type, so just using it can lead to asserts if odd types like `i300` are used (I added a testcase). I'm now using the getShiftAmountTyForConstant() helper to properly handle this.

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Comment at: lib/CodeGen/SelectionDAG/SelectionDAG.cpp:8963
+    ResScalars.push_back(getUNDEF(ResEltVT));
+    OvScalars.push_back(getUNDEF(OvEltVT));
+  }
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RKSimon wrote:
> Use append()?
How can append() be used in this context?

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D57997/new/

https://reviews.llvm.org/D57997