[llvm] r354036 - [Tests] Add tests for all idemptotent atomicrmws

[Philip Reames via llvm-commits]

Author: reames
Date: Thu Feb 14 09:01:15 2019
New Revision: 354036

URL: http://llvm.org/viewvc/llvm-project?rev=354036&view=rev
Log:
[Tests] Add tests for all idemptotent atomicrmws

Base for a followup patch to strengthen the InstCombine transform, and then integrate the ExpandAtomics logic.


Modified:
    llvm/trunk/test/Transforms/InstCombine/atomicrmw.ll

Modified: llvm/trunk/test/Transforms/InstCombine/atomicrmw.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/atomicrmw.ll?rev=354036&r1=354035&r2=354036&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/atomicrmw.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/atomicrmw.ll Thu Feb 14 09:01:15 2019
@@ -12,6 +12,62 @@ define i32 @atomic_add_zero(i32* %addr)
   ret i32 %res
 }
 
+; CHECK-LABEL: atomic_or_zero
+; CHECK-NEXT: %res = load atomic i32, i32* %addr monotonic, align 4
+; CHECK-NEXT: ret i32 %res
+define i32 @atomic_or_zero(i32* %addr) {
+  %res = atomicrmw add i32* %addr, i32 0 monotonic
+  ret i32 %res
+}
+
+; CHECK-LABEL: atomic_sub_zero
+; CHECK-NEXT: %res = load atomic i32, i32* %addr monotonic, align 4
+; CHECK-NEXT: ret i32 %res
+define i32 @atomic_sub_zero(i32* %addr) {
+  %res = atomicrmw sub i32* %addr, i32 0 monotonic
+  ret i32 %res
+}
+
+; CHECK-LABEL: atomic_and_allones
+; CHECK-NEXT: %res = atomicrmw and i32* %addr, i32 -1 monotonic
+; CHECK-NEXT: ret i32 %res
+define i32 @atomic_and_allones(i32* %addr) {
+  %res = atomicrmw and i32* %addr, i32 -1 monotonic
+  ret i32 %res
+}
+; CHECK-LABEL: atomic_umin_uint_max
+; CHECK-NEXT: %res = atomicrmw umin i32* %addr, i32 -1 monotonic
+; CHECK-NEXT: ret i32 %res
+define i32 @atomic_umin_uint_max(i32* %addr) {
+  %res = atomicrmw umin i32* %addr, i32 -1 monotonic
+  ret i32 %res
+}
+
+; CHECK-LABEL: atomic_umax_zero
+; CHECK-NEXT: %res = atomicrmw umax i32* %addr, i32 0 monotonic
+; CHECK-NEXT: ret i32 %res
+define i32 @atomic_umax_zero(i32* %addr) {
+  %res = atomicrmw umax i32* %addr, i32 0 monotonic
+  ret i32 %res
+}
+
+; CHECK-LABEL: atomic_min_smax_char
+; CHECK-NEXT: %res = atomicrmw min i8* %addr, i8 -128 monotonic
+; CHECK-NEXT: ret i8 %res
+define i8 @atomic_min_smax_char(i8* %addr) {
+  %res = atomicrmw min i8* %addr, i8 -128 monotonic
+  ret i8 %res
+}
+
+; CHECK-LABEL: atomic_max_smin_char
+; CHECK-NEXT: %res = atomicrmw max i8* %addr, i8 127 monotonic
+; CHECK-NEXT: ret i8 %res
+define i8 @atomic_max_smin_char(i8* %addr) {
+  %res = atomicrmw max i8* %addr, i8 127 monotonic
+  ret i8 %res
+}
+
+
 ; Don't transform volatile atomicrmw. This would eliminate a volatile store
 ; otherwise.
 ; CHECK-LABEL: atomic_sub_zero_volatile
@@ -24,10 +80,10 @@ define i64 @atomic_sub_zero_volatile(i64
 
 
 ; Check that the transformation properly preserve the syncscope.
-; CHECK-LABEL: atomic_or_zero
+; CHECK-LABEL: atomic_syncscope
 ; CHECK-NEXT: %res = load atomic i16, i16* %addr syncscope("some_syncscope") acquire, align 2
 ; CHECK-NEXT: ret i16 %res
-define i16 @atomic_or_zero(i16* %addr) {
+define i16 @atomic_syncscope(i16* %addr) {
   %res = atomicrmw or i16* %addr, i16 0 syncscope("some_syncscope") acquire
   ret i16 %res
 }
@@ -45,11 +101,11 @@ define i16 @atomic_or_zero_seq_cst(i16*
 
 ; Check that the transformation does not apply when the value is changed by
 ; the atomic operation (non zero constant).
-; CHECK-LABEL: atomic_or_non_zero
-; CHECK-NEXT: %res = atomicrmw or i16* %addr, i16 2 monotonic
+; CHECK-LABEL: atomic_add_non_zero
+; CHECK-NEXT: %res = atomicrmw add i16* %addr, i16 2 monotonic
 ; CHECK-NEXT: ret i16 %res
-define i16 @atomic_or_non_zero(i16* %addr) {
-  %res = atomicrmw or i16* %addr, i16 2 monotonic
+define i16 @atomic_add_non_zero(i16* %addr) {
+  %res = atomicrmw add i16* %addr, i16 2 monotonic
   ret i16 %res
 }