[PATCH] D58059: [AArch64] Print instruction before atomic semantic annotations
David Spickett via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 13 06:39:43 PST 2019
DavidSpickett updated this revision to Diff 186642.
DavidSpickett edited the summary of this revision.
Herald added a subscriber: jfb.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D58059/new/
https://reviews.llvm.org/D58059
Files:
lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
Index: lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
===================================================================
--- lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
+++ lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
@@ -69,11 +69,6 @@
return;
}
- if (atomicBarrierDroppedOnZero(Opcode) &&
- (MI->getOperand(0).getReg() == AArch64::XZR ||
- MI->getOperand(0).getReg() == AArch64::WZR))
- printAnnotation(O, "acquire semantics dropped since destination is zero");
-
// SBFM/UBFM should print to a nicer aliased form if possible.
if (Opcode == AArch64::SBFMXri || Opcode == AArch64::SBFMWri ||
Opcode == AArch64::UBFMXri || Opcode == AArch64::UBFMWri) {
@@ -297,6 +292,12 @@
printInstruction(MI, STI, O);
printAnnotation(O, Annot);
+
+ if (atomicBarrierDroppedOnZero(Opcode) &&
+ (MI->getOperand(0).getReg() == AArch64::XZR ||
+ MI->getOperand(0).getReg() == AArch64::WZR)) {
+ printAnnotation(O, "acquire semantics dropped since destination is zero");
+ }
}
static bool isTblTbxInstruction(unsigned Opcode, StringRef &Layout,
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