[PATCH] D58176: [ARM] Ensure we update the correct flags in the peephole optimiser

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: efriedma, t.p.northover, SjoerdMeijer.
Herald added subscribers: kristof.beyls, javed.absar.
Herald added a project: LLVM.

The Arm peephole optimiser code keeps track of both an MI and a SubAdd that can be
used to optimise away a CMP. In the rare case that both are found and not ruled-out as
valid, we could end up setting the flags on the wrong one.

Instead make sure we are using SubAdd if it exists, as it will be closer to the CMP.

The testcase here is a little theoretical, with a dead def of cpsr. It should hopefully show
the point.


Repository:
  rL LLVM

https://reviews.llvm.org/D58176

Files:
  lib/Target/ARM/ARMBaseInstrInfo.cpp
  test/CodeGen/Thumb2/peephole-addsub.mir


Index: test/CodeGen/Thumb2/peephole-addsub.mir
===================================================================
--- test/CodeGen/Thumb2/peephole-addsub.mir
+++ test/CodeGen/Thumb2/peephole-addsub.mir
@@ -29,7 +29,7 @@
     tBX_RET 14, $noreg, implicit $r0
 
 # CHECK-LABEL: name: test
-# CHECK:      %3:gprnopc = t2ADDrr %0, %1, 14, $noreg, def $cpsr
-# CHECK-NEXT: %4:gprnopc = t2SUBri %3, 0, 14, $noreg, def dead $cpsr
+# CHECK:      %3:gprnopc = t2ADDrr %0, %1, 14, $noreg, $noreg
+# CHECK-NEXT: %4:gprnopc = t2SUBri %3, 0, 14, $noreg, def $cpsr
 # CHECK-NEXT: %5:rgpr = t2MOVCCi %2, 0, 7, $cpsr
 ...
Index: lib/Target/ARM/ARMBaseInstrInfo.cpp
===================================================================
--- lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -2825,8 +2825,11 @@
   if (!MI && !SubAdd)
     return false;
 
-  // The single candidate is called MI.
-  if (!MI) MI = SubAdd;
+  // If we found a SubAdd, use it as it will be "closer"
+  if (SubAdd) {
+    MI = SubAdd;
+    IsThumb = false;
+  }
 
   // We can't use a predicated instruction - it doesn't always write the flags.
   if (isPredicated(*MI))


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