[PATCH] D58017: [DAG] Add SimplifyDemandedBits support for BSWAP/BITREVERSE

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

and+rev16/rev32 isn't really any better than rev+lsr; that's fine as far as it goes.  But please make sure we have coverage for cases where the zero-extension is free (e.g. the operand is a load, or a zeroext value, or the result of i32 arithmetic).


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D58017/new/

https://reviews.llvm.org/D58017