[llvm] r353759 - GlobalISel: Verify G_EXTRACT

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Mon Feb 11 14:12:43 2019
New Revision: 353759

URL: http://llvm.org/viewvc/llvm-project?rev=353759&view=rev
Log:
GlobalISel: Verify G_EXTRACT

Added:
    llvm/trunk/test/Verifier/test_g_extract.mir
Modified:
    llvm/trunk/lib/CodeGen/MachineVerifier.cpp
    llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir

Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=353759&r1=353758&r2=353759&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Mon Feb 11 14:12:43 2019
@@ -1261,6 +1261,28 @@ void MachineVerifier::verifyPreISelGener
 
     break;
   }
+  case TargetOpcode::G_EXTRACT: {
+    const MachineOperand &SrcOp = MI->getOperand(1);
+    if (!SrcOp.isReg()) {
+      report("extract source must be a register", MI);
+      break;
+    }
+
+    const MachineOperand &OffsetOp = MI->getOperand(2);
+    if (!OffsetOp.isImm()) {
+      report("extract offset must be a constant", MI);
+      break;
+    }
+
+    unsigned DstSize = MRI->getType(MI->getOperand(0).getReg()).getSizeInBits();
+    unsigned SrcSize = MRI->getType(SrcOp.getReg()).getSizeInBits();
+    if (SrcSize == DstSize)
+      report("extract source must be larger than result", MI);
+
+    if (DstSize + OffsetOp.getImm() > SrcSize)
+      report("extract reads past end of register", MI);
+    break;
+  }
   default:
     break;
   }

Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir?rev=353759&r1=353758&r2=353759&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir Mon Feb 11 14:12:43 2019
@@ -216,12 +216,12 @@ body: |
     ; CHECK: [[TRUNC:%[0-9]+]]:_(<6 x s1>) = G_TRUNC [[DEF]](<6 x s32>)
     ; CHECK: [[EXTRACT:%[0-9]+]]:_(<5 x s1>) = G_EXTRACT [[TRUNC]](<6 x s1>), 0
     ; CHECK: [[ANYEXT:%[0-9]+]]:_(<5 x s16>) = G_ANYEXT [[EXTRACT]](<5 x s1>)
-    ; CHECK: [[EXTRACT1:%[0-9]+]]:_(s16) = G_EXTRACT [[ANYEXT]](<5 x s16>), 80
+    ; CHECK: [[EXTRACT1:%[0-9]+]]:_(s16) = G_EXTRACT [[ANYEXT]](<5 x s16>), 64
     ; CHECK: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[EXTRACT1]](s16)
     ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC1]](s1)
     ; CHECK: $vgpr0 = COPY [[ANYEXT1]](s32)
     %0:_(<5 x s1>) = G_IMPLICIT_DEF
-    %1:_(s1) = G_EXTRACT %0, 5
+    %1:_(s1) = G_EXTRACT %0, 4
     %2:_(s32) = G_ANYEXT %1
     $vgpr0 = COPY %2
 ...

Added: llvm/trunk/test/Verifier/test_g_extract.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Verifier/test_g_extract.mir?rev=353759&view=auto
==============================================================================
--- llvm/trunk/test/Verifier/test_g_extract.mir (added)
+++ llvm/trunk/test/Verifier/test_g_extract.mir Mon Feb 11 14:12:43 2019
@@ -0,0 +1,35 @@
+# RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# REQUIRES: global-isel, aarch64-registered-target
+
+---
+name:            test_extract
+legalized:       true
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+liveins:
+body:             |
+  bb.0:
+
+    ; CHECK: Bad machine code: Too few operands
+    %0:_(s32) = G_EXTRACT
+
+    ; CHECK: Bad machine code: Too few operands
+    %1:_(s32) = G_EXTRACT 0
+
+    ; CHECK: Bad machine code: extract source must be a register
+    %2:_(s32) = G_EXTRACT 0, 1
+
+    ; CHECK: Bad machine code: extract offset must be a constant
+    %3:_(s32) = G_IMPLICIT_DEF
+    %4:_(s32) = G_CONSTANT i32 0
+    %5:_(s16) = G_EXTRACT %3, %4
+
+    ; CHECK: Bad machine code: extract source must be larger than result
+    %6:_(s32) = G_IMPLICIT_DEF
+    %7:_(s32) = G_EXTRACT %6, 0
+
+    ; CHECK: Bad machine code: extract reads past end of register
+    %8:_(s1) = G_EXTRACT %6, 32
+
+...