[PATCH] D45355: [SelectionDAG] Fix return calling convention in expansion of ?MULO
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 11 13:05:08 PST 2019
efriedma added inline comments.
================
Comment at: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:3439
"Ret value is a collection of constituent nodes holding result.");
- BottomHalf = Ret.getOperand(0);
- TopHalf = Ret.getOperand(1);
+ if(DAG.getDataLayout().isLittleEndian()) {
+ // Same as above.
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Whitespace
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Comment at: test/CodeGen/Thumb/umulo-32-legalisation-lowering.ll:36
+ %5 = insertvalue { i32, i8 } %4, i8 %3, 1
+ ret { i32, i8 } %5
+}
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I think you could simplify this to just return the i1, without losing any generality. If you do that, it's also much less likely that register allocation changes will affect the CHECK lines in the future.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D45355/new/
https://reviews.llvm.org/D45355
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