[llvm] r353553 - [GISel][NFC]: Add missing call to record CSE hits in the CSEMIRBuilder

[Aditya Nandakumar via llvm-commits]

Author: aditya_nandakumar
Date: Fri Feb  8 11:41:13 2019
New Revision: 353553

URL: http://llvm.org/viewvc/llvm-project?rev=353553&view=rev
Log:
[GISel][NFC]: Add missing call to record CSE hits in the CSEMIRBuilder

https://reviews.llvm.org/D57932

Add some logging + tests to make sure CSEInfo prints debug output.

reviewed by: arsenm

Added:
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext-csedebug-output.mir
Modified:
    llvm/trunk/lib/CodeGen/GlobalISel/CSEInfo.cpp
    llvm/trunk/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp

Modified: llvm/trunk/lib/CodeGen/GlobalISel/CSEInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/CSEInfo.cpp?rev=353553&r1=353552&r2=353553&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/CSEInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/CSEInfo.cpp Fri Feb  8 11:41:13 2019
@@ -138,7 +138,7 @@ MachineInstr *GISelCSEInfo::getMachineIn
                                                     void *&InsertPos) {
   handleRecordedInsts();
   if (auto *Inst = getNodeIfExists(ID, MBB, InsertPos)) {
-    LLVM_DEBUG(dbgs() << "CSEInfo: Found Instr " << *Inst->MI << "\n";);
+    LLVM_DEBUG(dbgs() << "CSEInfo::Found Instr " << *Inst->MI;);
     return const_cast<MachineInstr *>(Inst->MI);
   }
   return nullptr;
@@ -157,14 +157,14 @@ void GISelCSEInfo::countOpcodeHit(unsign
 void GISelCSEInfo::recordNewInstruction(MachineInstr *MI) {
   if (shouldCSE(MI->getOpcode())) {
     TemporaryInsts.insert(MI);
-    LLVM_DEBUG(dbgs() << "CSEInfo: Recording new MI " << *MI);
+    LLVM_DEBUG(dbgs() << "CSEInfo::Recording new MI " << *MI);
   }
 }
 
 void GISelCSEInfo::handleRecordedInst(MachineInstr *MI) {
   assert(shouldCSE(MI->getOpcode()) && "Invalid instruction for CSE");
   auto *UMI = InstrMapping.lookup(MI);
-  LLVM_DEBUG(dbgs() << "CSEInfo: Handling recorded MI " << *MI);
+  LLVM_DEBUG(dbgs() << "CSEInfo::Handling recorded MI " << *MI);
   if (UMI) {
     // Invalidate this MI.
     invalidateUniqueMachineInstr(UMI);
@@ -230,7 +230,7 @@ void GISelCSEInfo::analyze(MachineFuncti
 }
 
 void GISelCSEInfo::releaseMemory() {
-  // print();
+  print();
   CSEMap.clear();
   InstrMapping.clear();
   UniqueInstrAllocator.Reset();
@@ -244,11 +244,11 @@ void GISelCSEInfo::releaseMemory() {
 }
 
 void GISelCSEInfo::print() {
-#ifndef NDEBUG
-  for (auto &It : OpcodeHitTable) {
-    dbgs() << "CSE Count for Opc " << It.first << " : " << It.second << "\n";
-  };
-#endif
+  LLVM_DEBUG(for (auto &It
+                  : OpcodeHitTable) {
+    dbgs() << "CSEInfo::CSE Hit for Opc " << It.first << " : " << It.second
+           << "\n";
+  };);
 }
 /// -----------------------------------------
 // ---- Profiling methods for FoldingSetNode --- //

Modified: llvm/trunk/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp?rev=353553&r1=353552&r2=353553&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp Fri Feb  8 11:41:13 2019
@@ -39,6 +39,7 @@ CSEMIRBuilder::getDominatingInstrForID(F
   MachineInstr *MI =
       CSEInfo->getMachineInstrIfExists(ID, CurMBB, NodeInsertPos);
   if (MI) {
+    CSEInfo->countOpcodeHit(MI->getOpcode());
     auto CurrPos = getInsertPt();
     if (!dominates(MI, CurrPos))
       CurMBB->splice(CurrPos, CurMBB, MI);

Added: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext-csedebug-output.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext-csedebug-output.mir?rev=353553&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext-csedebug-output.mir (added)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext-csedebug-output.mir Fri Feb  8 11:41:13 2019
@@ -0,0 +1,35 @@
+# RUN: llc -march=aarch64 -run-pass=legalizer %s -o - -enable-cse-in-legalizer=1 -debug-only=cseinfo 2>&1 | FileCheck %s
+# Test the -debug-only=cseinfo option here to make sure we're recording new instructions and printing the hit count
+# at the end.
+# REQUIRES: asserts
+---
+name:            test_cse_in_legalizer
+body:             |
+  bb.0.entry:
+    ; CHECK: CSEInfo::Add MI: %{{[0-9]+}}:_(s8) = G_TRUNC
+    ; CHECK: CSEInfo::Add MI: %{{[0-9]+}}:_(s32) = G_ZEXT
+    ; CHECK: CSEInfo::Add MI: %{{[0-9]+}}:_(s8) = G_TRUNC
+    ; CHECK: CSEInfo::Add MI: %{{[0-9]+}}:_(s32) = G_ZEXT
+    ; CHECK: CSEInfo::Recording new MI G_CONSTANT
+    ; CHECK: CSEInfo::Recording new MI G_CONSTANT
+    ; CHECK: CSEInfo::Recording new MI G_TRUNC
+    ; CHECK: CSEInfo::Recording new MI G_TRUNC
+    ; CHECK: CSEInfo::Recording new MI G_AND
+    ; CHECK: CSEInfo::Recording new MI G_AND
+    ; CHECK: CSEInfo::Found Instr %{{[0-9]+}}:_(s32) = G_CONSTANT
+    ; CHECK: CSEInfo::Found Instr %{{[0-9]+}}:_(s32) = G_TRUNC
+    ; CHECK: CSEInfo::Found Instr %{{[0-9]+}}:_(s32) = G_AND
+    ; Note - these will be sensitive the opcode numbers. If
+    ; frequently modifying generic opcodes, we could just regex
+    ; the opcodes in the following lines instead of checking for
+    ; specific opcode numbers.
+    ; CHECK: CSEInfo::CSE Hit for Opc 82 : 1
+    ; CHECK: CSEInfo::CSE Hit for Opc 41 : 1
+    ; CHECK: CSEInfo::CSE Hit for Opc 83 : 1
+    %0:_(s64) = COPY $x0
+    %1:_(s8) = G_TRUNC %0(s64)
+    %19:_(s32) = G_ZEXT %1(s8)
+    $w0 = COPY %19(s32)
+    %2:_(s8) = G_TRUNC %0(s64)
+    %20:_(s32) = G_ZEXT %2(s8)
+    $w0 = COPY %20(s32)