[llvm] r353534 - [X86] Add basic funnel shift demanded bits tests
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 8 08:51:16 PST 2019
Author: rksimon
Date: Fri Feb 8 08:51:16 2019
New Revision: 353534
URL: http://llvm.org/viewvc/llvm-project?rev=353534&view=rev
Log:
[X86] Add basic funnel shift demanded bits tests
Modified:
llvm/trunk/test/CodeGen/X86/funnel-shift.ll
Modified: llvm/trunk/test/CodeGen/X86/funnel-shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/funnel-shift.ll?rev=353534&r1=353533&r2=353534&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/funnel-shift.ll (original)
+++ llvm/trunk/test/CodeGen/X86/funnel-shift.ll Fri Feb 8 08:51:16 2019
@@ -318,6 +318,54 @@ define i7 @fshr_i7_const_fold() nounwind
ret i7 %f
}
+; demanded bits tests
+
+define i32 @fshl_i32_demandedbits(i32 %a0, i32 %a1) nounwind {
+; X32-SSE2-LABEL: fshl_i32_demandedbits:
+; X32-SSE2: # %bb.0:
+; X32-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X32-SSE2-NEXT: movl $-2147483648, %ecx # imm = 0x80000000
+; X32-SSE2-NEXT: orl {{[0-9]+}}(%esp), %ecx
+; X32-SSE2-NEXT: orl $1, %eax
+; X32-SSE2-NEXT: shrdl $23, %ecx, %eax
+; X32-SSE2-NEXT: retl
+;
+; X64-AVX2-LABEL: fshl_i32_demandedbits:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: movl %esi, %eax
+; X64-AVX2-NEXT: orl $-2147483648, %edi # imm = 0x80000000
+; X64-AVX2-NEXT: orl $1, %eax
+; X64-AVX2-NEXT: shrdl $23, %edi, %eax
+; X64-AVX2-NEXT: retq
+ %x = or i32 %a0, 2147483648
+ %y = or i32 %a1, 1
+ %res = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 9)
+ ret i32 %res
+}
+
+define i32 @fshr_i32_demandedbits(i32 %a0, i32 %a1) nounwind {
+; X32-SSE2-LABEL: fshr_i32_demandedbits:
+; X32-SSE2: # %bb.0:
+; X32-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X32-SSE2-NEXT: movl $-2147483648, %ecx # imm = 0x80000000
+; X32-SSE2-NEXT: orl {{[0-9]+}}(%esp), %ecx
+; X32-SSE2-NEXT: orl $1, %eax
+; X32-SSE2-NEXT: shrdl $9, %ecx, %eax
+; X32-SSE2-NEXT: retl
+;
+; X64-AVX2-LABEL: fshr_i32_demandedbits:
+; X64-AVX2: # %bb.0:
+; X64-AVX2-NEXT: movl %esi, %eax
+; X64-AVX2-NEXT: orl $-2147483648, %edi # imm = 0x80000000
+; X64-AVX2-NEXT: orl $1, %eax
+; X64-AVX2-NEXT: shrdl $9, %edi, %eax
+; X64-AVX2-NEXT: retq
+ %x = or i32 %a0, 2147483648
+ %y = or i32 %a1, 1
+ %res = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 9)
+ ret i32 %res
+}
+
; With constant shift amount, this is 'shrd' or 'shld'.
define i32 @fshr_i32_const_shift(i32 %x, i32 %y) nounwind {
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