[PATCH] D57954: [ARM] LoadStoreOptimizer: reoder limit

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer created this revision.
SjoerdMeijer added reviewers: samparker, dmgreen, efriedma.
Herald added subscribers: kristof.beyls, javed.absar.

Today I was a bit distracted by the loadstoreoptimiser because it didn't do 
what I wanted/expected.

This patch adds a (hidden) option to control the total number of instructions that
can be re-ordered. I appreciate this looks only a tiny bit better than a hard-coded
constant, but at least it allows more easy experimentation with different values
for now. Ideally we calculate this reorder limit based on some heuristics. I might be
looking into that next.

A second patch that I will add soon, is a simple clean up.


https://reviews.llvm.org/D57954

Files:
  lib/Target/ARM/ARMLoadStoreOptimizer.cpp
  test/CodeGen/ARM/prera-ldst-insertpt.mir


Index: test/CodeGen/ARM/prera-ldst-insertpt.mir
===================================================================
--- test/CodeGen/ARM/prera-ldst-insertpt.mir
+++ test/CodeGen/ARM/prera-ldst-insertpt.mir
@@ -1,4 +1,6 @@
 # RUN: llc -run-pass arm-prera-ldst-opt %s -o - | FileCheck %s
+# RUN: llc -run-pass arm-prera-ldst-opt -arm-prera-ldst-opt-reorder-limit=3 %s -o - | FileCheck %s
+# RUN: llc -run-pass arm-prera-ldst-opt -arm-prera-ldst-opt-reorder-limit=2 %s -o - | FileCheck %s --check-prefix=CHECK-LIMIT
 --- |
   target triple = "thumbv7---eabi"
 
@@ -79,12 +81,18 @@
 
     ; Make sure we move the paired stores next to each other, and
     ; insert them in an appropriate location.
-    ; CHECK: t2STRi12 {{.*}}, 0
+    ; CHECK:      t2STRi12 {{.*}}, 0
     ; CHECK-NEXT: t2STRi12 {{.*}}, 4
     ; CHECK-NEXT: t2STRi12 {{.*}}, 8
     ; CHECK-NEXT: t2MUL
     ; CHECK-NEXT: t2MOVi32imm
 
+    ; CHECK-LIMIT-LABEL: name: b
+    ; CHECK-LIMIT:      t2STRi12 {{.*}}, 0
+    ; CHECK-LIMIT-NEXT: t2STRi12 {{.*}}, 4
+    ; CHECK-LIMIT-NEXT: t2MUL
+    ; CHECK-LIMIT-NEXT: t2STRi12 {{.*}}, 8
+
     %4 : rgpr = t2MUL %1, %1, 14, $noreg
     %5 : rgpr = t2MOVi32imm -858993459
     %6 : rgpr, %7 : rgpr  = t2UMULL killed %3, %5, 14, $noreg
Index: lib/Target/ARM/ARMLoadStoreOptimizer.cpp
===================================================================
--- lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -2047,6 +2047,11 @@
 INITIALIZE_PASS(ARMPreAllocLoadStoreOpt, "arm-prera-ldst-opt",
                 ARM_PREALLOC_LOAD_STORE_OPT_NAME, false, false)
 
+// Limit the number of instructions to be rescheduled.
+// FIXME: tune this limit, and/or come up with some better heuristics.
+static cl::opt<unsigned> InstReorderLimit("arm-prera-ldst-opt-reorder-limit",
+                                          cl::init(8), cl::Hidden);
+
 bool ARMPreAllocLoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) {
   if (AssumeMisalignedLoadStores || skipFunction(Fn.getFunction()))
     return false;
@@ -2222,7 +2227,7 @@
       }
 
       // Don't try to reschedule too many instructions.
-      if (NumMove == 8) // FIXME: Tune this limit.
+      if (NumMove == InstReorderLimit)
         break;
 
       // Found a mergable instruction; save information about it.


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