[PATCH] D57888: [X86][SSE] Generalize X86ISD::BLENDI support to more value types (WIP)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: craig.topper, andreadb, spatel, lebedev.ri.
Herald added a project: LLVM.

WIP patch for comments.

D42042 <https://reviews.llvm.org/D42042> introduced the ability for the ExecutionDomainFixPass to more easily change between BLENDPD/BLENDPS/PBLENDW as the domains required.

With this ability, we can avoid most bitcasts/scaling in the DAG that was occurring with X86ISD::BLENDI lowering/combining, blend with the vXi32/vXi64 vectors directly and use isel patterns to lower to the float vector equivalent vectors.

This helps the shuffle combining and SimplifyDemandedVectorElts be more aggressive as we lose track of fewer UNDEF elements than when we go up/down through bitcasts.

I've introduced a basic blend(bitcast(x),bitcast(y)) -> bitcast(blend(x,y)) fold, there are more generalizations I can do there (e.g. widening/scaling and handling the tricky v16i16 repeated mask case).

I haven't gotten to the bottom of the vector-reduce-smin/smax regression either yet.


Repository:
  rL LLVM

https://reviews.llvm.org/D57888

Files:
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86InstrSSE.td
  test/CodeGen/X86/avx512-shuffles/partial_permute.ll
  test/CodeGen/X86/combine-sdiv.ll
  test/CodeGen/X86/insertelement-ones.ll
  test/CodeGen/X86/known-signbits-vector.ll
  test/CodeGen/X86/masked_load.ll
  test/CodeGen/X86/masked_store.ll
  test/CodeGen/X86/oddshuffles.ll
  test/CodeGen/X86/packss.ll
  test/CodeGen/X86/pr34592.ll
  test/CodeGen/X86/prefer-avx256-mask-shuffle.ll
  test/CodeGen/X86/sse2.ll
  test/CodeGen/X86/vector-reduce-smax.ll
  test/CodeGen/X86/vector-reduce-smin.ll
  test/CodeGen/X86/vector-shift-ashr-256.ll
  test/CodeGen/X86/vector-shuffle-128-v8.ll
  test/CodeGen/X86/vector-shuffle-256-v16.ll
  test/CodeGen/X86/vector-shuffle-256-v32.ll

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